ppc64

Imports

Imports #

"cmd/internal/obj"
"fmt"
"cmd/internal/obj"
"cmd/internal/objabi"
"cmd/internal/src"
"cmd/internal/sys"
"internal/abi"
"internal/buildcfg"
"log"
"math"
"math/bits"
"strings"
"cmd/internal/obj"
"cmd/internal/obj"
"cmd/internal/obj"
"cmd/internal/objabi"
"encoding/binary"
"fmt"
"internal/buildcfg"
"log"
"math"
"math/bits"
"sort"
"cmd/internal/obj"

Constants & Variables

AADD const #

const AADD = *ast.BinaryExpr

AADDC const #

const AADDC

AADDCC const #

const AADDCC

AADDCCC const #

const AADDCCC

AADDCV const #

const AADDCV

AADDCVCC const #

const AADDCVCC

AADDE const #

const AADDE

AADDECC const #

const AADDECC

AADDEV const #

const AADDEV

AADDEVCC const #

const AADDEVCC

AADDEX const #

const AADDEX

AADDIS const #

const AADDIS

AADDME const #

const AADDME

AADDMECC const #

const AADDMECC

AADDMEV const #

const AADDMEV

AADDMEVCC const #

const AADDMEVCC

AADDV const #

const AADDV

AADDVCC const #

const AADDVCC

AADDZE const #

const AADDZE

AADDZECC const #

const AADDZECC

AADDZEV const #

const AADDZEV

AADDZEVCC const #

const AADDZEVCC

AAND const #

const AAND

AANDCC const #

const AANDCC

AANDISCC const #

const AANDISCC

AANDN const #

const AANDN

AANDNCC const #

const AANDNCC

ABC const #

const ABC

ABCL const #

const ABCL

ABDNZ const #

const ABDNZ

ABDZ const #

const ABDZ

ABEQ const #

const ABEQ

ABGE const #

const ABGE

ABGT const #

const ABGT

ABL const #

const ABL = obj.ACALL

ABLE const #

const ABLE

ABLT const #

const ABLT

ABNE const #

const ABNE

ABR const #

aliases

const ABR = obj.AJMP

ABRD const #

const ABRD

ABRH const #

const ABRH

ABRW const #

const ABRW

ABVC const #

const ABVC

ABVS const #

const ABVS

ACFUGED const #

const ACFUGED

ACLRLSLDI const #

const ACLRLSLDI

ACLRLSLWI const #

const ACLRLSLWI

ACMP const #

const ACMP

ACMPB const #

const ACMPB

ACMPEQB const #

const ACMPEQB

ACMPU const #

const ACMPU

ACMPW const #

const ACMPW

ACMPWU const #

const ACMPWU

ACNTLZD const #

const ACNTLZD

ACNTLZDCC const #

const ACNTLZDCC

ACNTLZDM const #

const ACNTLZDM

ACNTLZW const #

const ACNTLZW

ACNTLZWCC const #

const ACNTLZWCC

ACNTTZD const #

const ACNTTZD

ACNTTZDCC const #

const ACNTTZDCC

ACNTTZDM const #

const ACNTTZDM

ACNTTZW const #

const ACNTTZW

ACNTTZWCC const #

const ACNTTZWCC

ACOPY const #

const ACOPY

ACRAND const #

const ACRAND

ACRANDN const #

const ACRANDN

ACREQV const #

const ACREQV

ACRNAND const #

const ACRNAND

ACRNOR const #

const ACRNOR

ACROR const #

const ACROR

ACRORN const #

const ACRORN

ACRXOR const #

const ACRXOR

ADADD const #

const ADADD

ADADDQ const #

const ADADDQ

ADARN const #

const ADARN

ADCBF const #

const ADCBF

ADCBI const #

const ADCBI

ADCBST const #

const ADCBST

ADCBT const #

const ADCBT

ADCBTST const #

const ADCBTST

ADCBZ const #

const ADCBZ

ADCFFIXQQ const #

const ADCFFIXQQ

ADCMPO const #

const ADCMPO

ADCMPOQ const #

const ADCMPOQ

ADCMPU const #

const ADCMPU

ADCMPUQ const #

const ADCMPUQ

ADCTFIXQQ const #

const ADCTFIXQQ

ADDIV const #

const ADDIV

ADDIVQ const #

const ADDIVQ

ADIVD const #

const ADIVD

ADIVDCC const #

const ADIVDCC

ADIVDE const #

const ADIVDE

ADIVDECC const #

const ADIVDECC

ADIVDEU const #

const ADIVDEU

ADIVDEUCC const #

const ADIVDEUCC

ADIVDU const #

const ADIVDU

ADIVDUCC const #

const ADIVDUCC

ADIVDUV const #

const ADIVDUV

ADIVDUVCC const #

const ADIVDUVCC

ADIVDV const #

const ADIVDV

ADIVDVCC const #

const ADIVDVCC

ADIVW const #

const ADIVW

ADIVWCC const #

const ADIVWCC

ADIVWU const #

const ADIVWU

ADIVWUCC const #

const ADIVWUCC

ADIVWUV const #

const ADIVWUV

ADIVWUVCC const #

const ADIVWUVCC

ADIVWV const #

const ADIVWV

ADIVWVCC const #

const ADIVWVCC

ADMUL const #

const ADMUL

ADMULQ const #

const ADMULQ

ADSUB const #

const ADSUB

ADSUBQ const #

const ADSUBQ

ADWORD const #

64-bit pseudo operation

const ADWORD

AEIEIO const #

const AEIEIO

AEQV const #

const AEQV

AEQVCC const #

const AEQVCC

AEXTSB const #

const AEXTSB

AEXTSBCC const #

const AEXTSBCC

AEXTSH const #

const AEXTSH

AEXTSHCC const #

const AEXTSHCC

AEXTSW const #

const AEXTSW

AEXTSWCC const #

const AEXTSWCC

AEXTSWSLI const #

const AEXTSWSLI

AEXTSWSLICC const #

const AEXTSWSLICC

AFABS const #

const AFABS

AFABSCC const #

const AFABSCC

AFADD const #

const AFADD

AFADDCC const #

const AFADDCC

AFADDS const #

const AFADDS

AFADDSCC const #

const AFADDSCC

AFCFID const #

AFCFIW; AFCFIWCC

const AFCFID

AFCFIDCC const #

const AFCFIDCC

AFCFIDS const #

const AFCFIDS

AFCFIDSCC const #

const AFCFIDSCC

AFCFIDU const #

const AFCFIDU

AFCFIDUCC const #

const AFCFIDUCC

AFCMPO const #

const AFCMPO

AFCMPU const #

const AFCMPU

AFCPSGN const #

const AFCPSGN

AFCPSGNCC const #

const AFCPSGNCC

AFCTID const #

const AFCTID

AFCTIDCC const #

const AFCTIDCC

AFCTIDZ const #

const AFCTIDZ

AFCTIDZCC const #

const AFCTIDZCC

AFCTIW const #

const AFCTIW

AFCTIWCC const #

const AFCTIWCC

AFCTIWZ const #

const AFCTIWZ

AFCTIWZCC const #

const AFCTIWZCC

AFDIV const #

const AFDIV

AFDIVCC const #

const AFDIVCC

AFDIVS const #

const AFDIVS

AFDIVSCC const #

const AFDIVSCC

AFIRSTGEN const #

const AFIRSTGEN = AXXSETACCZ

AFMADD const #

const AFMADD

AFMADDCC const #

const AFMADDCC

AFMADDS const #

const AFMADDS

AFMADDSCC const #

const AFMADDSCC

AFMOVD const #

const AFMOVD

AFMOVDCC const #

const AFMOVDCC

AFMOVDU const #

const AFMOVDU

AFMOVS const #

const AFMOVS

AFMOVSU const #

const AFMOVSU

AFMOVSX const #

const AFMOVSX

AFMOVSZ const #

const AFMOVSZ

AFMSUB const #

const AFMSUB

AFMSUBCC const #

const AFMSUBCC

AFMSUBS const #

const AFMSUBS

AFMSUBSCC const #

const AFMSUBSCC

AFMUL const #

const AFMUL

AFMULCC const #

const AFMULCC

AFMULS const #

const AFMULS

AFMULSCC const #

const AFMULSCC

AFNABS const #

const AFNABS

AFNABSCC const #

const AFNABSCC

AFNEG const #

const AFNEG

AFNEGCC const #

const AFNEGCC

AFNMADD const #

const AFNMADD

AFNMADDCC const #

const AFNMADDCC

AFNMADDS const #

const AFNMADDS

AFNMADDSCC const #

const AFNMADDSCC

AFNMSUB const #

const AFNMSUB

AFNMSUBCC const #

const AFNMSUBCC

AFNMSUBS const #

const AFNMSUBS

AFNMSUBSCC const #

const AFNMSUBSCC

AFRES const #

optional on 32-bit

const AFRES

AFRESCC const #

const AFRESCC

AFRIM const #

const AFRIM

AFRIMCC const #

const AFRIMCC

AFRIN const #

const AFRIN

AFRINCC const #

const AFRINCC

AFRIP const #

const AFRIP

AFRIPCC const #

const AFRIPCC

AFRIZ const #

const AFRIZ

AFRIZCC const #

const AFRIZCC

AFRSP const #

const AFRSP

AFRSPCC const #

const AFRSPCC

AFRSQRTE const #

const AFRSQRTE

AFRSQRTECC const #

const AFRSQRTECC

AFSEL const #

const AFSEL

AFSELCC const #

const AFSELCC

AFSQRT const #

const AFSQRT

AFSQRTCC const #

const AFSQRTCC

AFSQRTS const #

const AFSQRTS

AFSQRTSCC const #

const AFSQRTSCC

AFSUB const #

const AFSUB

AFSUBCC const #

const AFSUBCC

AFSUBS const #

const AFSUBS

AFSUBSCC const #

const AFSUBSCC

AFTDIV const #

const AFTDIV

AFTSQRT const #

const AFTSQRT

AHASHCHK const #

const AHASHCHK

AHASHCHKP const #

const AHASHCHKP

AHASHST const #

const AHASHST

AHASHSTP const #

const AHASHSTP

AHRFID const #

more 64-bit operations

const AHRFID

AICBI const #

const AICBI

AISEL const #

const AISEL

AISYNC const #

const AISYNC

ALAST const #

const ALAST = ALASTGEN

ALASTAOUT const #

const ALASTAOUT

ALASTGEN const #

const ALASTGEN

ALBAR const #

const ALBAR

ALDAR const #

const ALDAR

ALHAR const #

const ALHAR

ALSW const #

const ALSW

ALVEBX const #

Vector

const ALVEBX

ALVEHX const #

const ALVEHX

ALVEWX const #

const ALVEWX

ALVSL const #

const ALVSL

ALVSR const #

const ALVSR

ALVX const #

const ALVX

ALVXL const #

const ALVXL

ALWAR const #

const ALWAR

ALWSYNC const #

const ALWSYNC

ALXSDX const #

const ALXSDX

ALXSIWAX const #

const ALXSIWAX

ALXSIWZX const #

const ALXSIWZX

ALXV const #

VSX

const ALXV

ALXVB16X const #

const ALXVB16X

ALXVD2X const #

const ALXVD2X

ALXVDSX const #

const ALXVDSX

ALXVH8X const #

const ALXVH8X

ALXVKQ const #

const ALXVKQ

ALXVL const #

const ALXVL

ALXVLL const #

const ALXVLL

ALXVP const #

const ALXVP

ALXVPX const #

const ALXVPX

ALXVRBX const #

const ALXVRBX

ALXVRDX const #

const ALXVRDX

ALXVRHX const #

const ALXVRHX

ALXVRWX const #

const ALXVRWX

ALXVW4X const #

const ALXVW4X

ALXVX const #

const ALXVX

AMADDHD const #

const AMADDHD

AMADDHDU const #

const AMADDHDU

AMADDLD const #

const AMADDLD

AMFFPRD const #

const AMFFPRD

AMFVRD const #

const AMFVRD

AMFVSRD const #

const AMFVSRD

AMFVSRLD const #

const AMFVSRLD

AMFVSRWZ const #

const AMFVSRWZ

AMODSD const #

const AMODSD

AMODSW const #

const AMODSW

AMODUD const #

const AMODUD

AMODUW const #

const AMODUW

AMOVB const #

const AMOVB

AMOVBU const #

const AMOVBU

AMOVBZ const #

const AMOVBZ

AMOVBZU const #

const AMOVBZU

AMOVCRFS const #

const AMOVCRFS

AMOVD const #

const AMOVD

AMOVDBR const #

const AMOVDBR

AMOVDU const #

const AMOVDU

AMOVFL const #

const AMOVFL

AMOVH const #

const AMOVH

AMOVHBR const #

const AMOVHBR

AMOVHU const #

const AMOVHU

AMOVHZ const #

const AMOVHZ

AMOVHZU const #

const AMOVHZU

AMOVMW const #

const AMOVMW

AMOVW const #

const AMOVW

AMOVWBR const #

const AMOVWBR

AMOVWU const #

const AMOVWU

AMOVWZ const #

const AMOVWZ

AMOVWZU const #

const AMOVWZU

AMTFPRD const #

const AMTFPRD

AMTFSB0 const #

const AMTFSB0

AMTFSB0CC const #

const AMTFSB0CC

AMTFSB1 const #

const AMTFSB1

AMTFSB1CC const #

const AMTFSB1CC

AMTVRD const #

const AMTVRD

AMTVSRBM const #

const AMTVSRBM

AMTVSRBMI const #

const AMTVSRBMI

AMTVSRD const #

const AMTVSRD

AMTVSRDD const #

const AMTVSRDD

AMTVSRDM const #

const AMTVSRDM

AMTVSRHM const #

const AMTVSRHM

AMTVSRQM const #

const AMTVSRQM

AMTVSRWA const #

const AMTVSRWA

AMTVSRWM const #

const AMTVSRWM

AMTVSRWS const #

const AMTVSRWS

AMTVSRWZ const #

const AMTVSRWZ

AMULHD const #

const AMULHD

AMULHDCC const #

const AMULHDCC

AMULHDU const #

const AMULHDU

AMULHDUCC const #

const AMULHDUCC

AMULHW const #

const AMULHW

AMULHWCC const #

const AMULHWCC

AMULHWU const #

const AMULHWU

AMULHWUCC const #

const AMULHWUCC

AMULLD const #

const AMULLD

AMULLDCC const #

const AMULLDCC

AMULLDV const #

const AMULLDV

AMULLDVCC const #

const AMULLDVCC

AMULLW const #

const AMULLW

AMULLWCC const #

const AMULLWCC

AMULLWV const #

const AMULLWV

AMULLWVCC const #

const AMULLWVCC

ANAND const #

const ANAND

ANANDCC const #

const ANANDCC

ANEG const #

const ANEG

ANEGCC const #

const ANEGCC

ANEGV const #

const ANEGV

ANEGVCC const #

const ANEGVCC

ANOR const #

const ANOR

ANORCC const #

const ANORCC

AOR const #

const AOR

AORCC const #

const AORCC

AORIS const #

const AORIS

AORN const #

const AORN

AORNCC const #

const AORNCC

APADDI const #

const APADDI

APASTECC const #

const APASTECC

APDEPD const #

const APDEPD

APEXTD const #

const APEXTD

APLBZ const #

const APLBZ

APLD const #

const APLD

APLFD const #

const APLFD

APLFS const #

const APLFS

APLHA const #

const APLHA

APLHZ const #

const APLHZ

APLQ const #

const APLQ

APLWA const #

const APLWA

APLWZ const #

const APLWZ

APLXSD const #

const APLXSD

APLXSSP const #

const APLXSSP

APLXV const #

const APLXV

APLXVP const #

const APLXVP

APMXVBF16GER2 const #

const APMXVBF16GER2

APMXVBF16GER2NN const #

const APMXVBF16GER2NN

APMXVBF16GER2NP const #

const APMXVBF16GER2NP

APMXVBF16GER2PN const #

const APMXVBF16GER2PN

APMXVBF16GER2PP const #

const APMXVBF16GER2PP

APMXVF16GER2 const #

const APMXVF16GER2

APMXVF16GER2NN const #

const APMXVF16GER2NN

APMXVF16GER2NP const #

const APMXVF16GER2NP

APMXVF16GER2PN const #

const APMXVF16GER2PN

APMXVF16GER2PP const #

const APMXVF16GER2PP

APMXVF32GER const #

const APMXVF32GER

APMXVF32GERNN const #

const APMXVF32GERNN

APMXVF32GERNP const #

const APMXVF32GERNP

APMXVF32GERPN const #

const APMXVF32GERPN

APMXVF32GERPP const #

const APMXVF32GERPP

APMXVF64GER const #

const APMXVF64GER

APMXVF64GERNN const #

const APMXVF64GERNN

APMXVF64GERNP const #

const APMXVF64GERNP

APMXVF64GERPN const #

const APMXVF64GERPN

APMXVF64GERPP const #

const APMXVF64GERPP

APMXVI16GER2 const #

const APMXVI16GER2

APMXVI16GER2PP const #

const APMXVI16GER2PP

APMXVI16GER2S const #

const APMXVI16GER2S

APMXVI16GER2SPP const #

const APMXVI16GER2SPP

APMXVI4GER8 const #

const APMXVI4GER8

APMXVI4GER8PP const #

const APMXVI4GER8PP

APMXVI8GER4 const #

const APMXVI8GER4

APMXVI8GER4PP const #

const APMXVI8GER4PP

APMXVI8GER4SPP const #

const APMXVI8GER4SPP

APNOP const #

const APNOP

APOPCNTB const #

const APOPCNTB

APOPCNTD const #

const APOPCNTD

APOPCNTW const #

const APOPCNTW

APSTB const #

const APSTB

APSTD const #

const APSTD

APSTFD const #

const APSTFD

APSTFS const #

const APSTFS

APSTH const #

const APSTH

APSTQ const #

const APSTQ

APSTW const #

const APSTW

APSTXSD const #

const APSTXSD

APSTXSSP const #

const APSTXSSP

APSTXV const #

const APSTXV

APSTXVP const #

const APSTXVP

APTESYNC const #

const APTESYNC

AREM const #

const AREM

AREMD const #

const AREMD

AREMDU const #

const AREMDU

AREMU const #

const AREMU

ARFCI const #

const ARFCI

ARFI const #

const ARFI

ARFID const #

const ARFID

ARLDC const #

const ARLDC

ARLDCCC const #

const ARLDCCC

ARLDCL const #

const ARLDCL

ARLDCLCC const #

const ARLDCLCC

ARLDCR const #

const ARLDCR

ARLDCRCC const #

const ARLDCRCC

ARLDIC const #

const ARLDIC

ARLDICCC const #

const ARLDICCC

ARLDICL const #

const ARLDICL

ARLDICLCC const #

const ARLDICLCC

ARLDICR const #

const ARLDICR

ARLDICRCC const #

const ARLDICRCC

ARLDIMI const #

const ARLDIMI

ARLDIMICC const #

const ARLDIMICC

ARLDMI const #

const ARLDMI

ARLDMICC const #

const ARLDMICC

ARLWMI const #

const ARLWMI

ARLWMICC const #

const ARLWMICC

ARLWNM const #

const ARLWNM

ARLWNMCC const #

const ARLWNMCC

AROTL const #

const AROTL

AROTLW const #

const AROTLW

ASETB const #

const ASETB

ASETBC const #

const ASETBC

ASETBCR const #

const ASETBCR

ASETNBC const #

const ASETNBC

ASETNBCR const #

const ASETNBCR

ASLBIA const #

const ASLBIA

ASLBIE const #

const ASLBIE

ASLBMFEE const #

const ASLBMFEE

ASLBMFEV const #

const ASLBMFEV

ASLBMTE const #

const ASLBMTE

ASLD const #

const ASLD

ASLDCC const #

const ASLDCC

ASLW const #

const ASLW

ASLWCC const #

const ASLWCC

ASRAD const #

const ASRAD

ASRADCC const #

const ASRADCC

ASRAW const #

const ASRAW

ASRAWCC const #

const ASRAWCC

ASRD const #

const ASRD

ASRDCC const #

const ASRDCC

ASRW const #

const ASRW

ASRWCC const #

const ASRWCC

ASTBCCC const #

const ASTBCCC

ASTDCCC const #

const ASTDCCC

ASTHCCC const #

const ASTHCCC

ASTSW const #

const ASTSW

ASTVEBX const #

const ASTVEBX

ASTVEHX const #

const ASTVEHX

ASTVEWX const #

const ASTVEWX

ASTVX const #

const ASTVX

ASTVXL const #

const ASTVXL

ASTWCCC const #

const ASTWCCC

ASTXSDX const #

const ASTXSDX

ASTXSIWX const #

const ASTXSIWX

ASTXV const #

const ASTXV

ASTXVB16X const #

const ASTXVB16X

ASTXVD2X const #

const ASTXVD2X

ASTXVH8X const #

const ASTXVH8X

ASTXVL const #

const ASTXVL

ASTXVLL const #

const ASTXVLL

ASTXVP const #

const ASTXVP

ASTXVPX const #

const ASTXVPX

ASTXVRBX const #

const ASTXVRBX

ASTXVRDX const #

const ASTXVRDX

ASTXVRHX const #

const ASTXVRHX

ASTXVRWX const #

const ASTXVRWX

ASTXVW4X const #

const ASTXVW4X

ASTXVX const #

const ASTXVX

ASUB const #

const ASUB

ASUBC const #

const ASUBC

ASUBCC const #

const ASUBCC

ASUBCCC const #

const ASUBCCC

ASUBCV const #

const ASUBCV

ASUBCVCC const #

const ASUBCVCC

ASUBE const #

const ASUBE

ASUBECC const #

const ASUBECC

ASUBEV const #

const ASUBEV

ASUBEVCC const #

const ASUBEVCC

ASUBME const #

const ASUBME

ASUBMECC const #

const ASUBMECC

ASUBMEV const #

const ASUBMEV

ASUBMEVCC const #

const ASUBMEVCC

ASUBV const #

const ASUBV

ASUBVCC const #

const ASUBVCC

ASUBZE const #

const ASUBZE

ASUBZECC const #

const ASUBZECC

ASUBZEV const #

const ASUBZEV

ASUBZEVCC const #

const ASUBZEVCC

ASYNC const #

const ASYNC

ASYSCALL const #

const ASYSCALL

ATD const #

const ATD

ATLBIE const #

const ATLBIE

ATLBIEL const #

const ATLBIEL

ATLBSYNC const #

const ATLBSYNC

ATW const #

const ATW

AVADDCU const #

const AVADDCU

AVADDCUQ const #

const AVADDCUQ

AVADDCUW const #

const AVADDCUW

AVADDE const #

const AVADDE

AVADDECUQ const #

const AVADDECUQ

AVADDEUQM const #

const AVADDEUQM

AVADDSBS const #

const AVADDSBS

AVADDSHS const #

const AVADDSHS

AVADDSS const #

const AVADDSS

AVADDSWS const #

const AVADDSWS

AVADDUBM const #

const AVADDUBM

AVADDUBS const #

const AVADDUBS

AVADDUDM const #

const AVADDUDM

AVADDUHM const #

const AVADDUHM

AVADDUHS const #

const AVADDUHS

AVADDUM const #

const AVADDUM

AVADDUQM const #

const AVADDUQM

AVADDUS const #

const AVADDUS

AVADDUWM const #

const AVADDUWM

AVADDUWS const #

const AVADDUWS

AVAND const #

const AVAND

AVANDC const #

const AVANDC

AVBPERMD const #

const AVBPERMD

AVBPERMQ const #

const AVBPERMQ

AVCFUGED const #

const AVCFUGED

AVCIPH const #

const AVCIPH

AVCIPHER const #

const AVCIPHER

AVCIPHERLAST const #

const AVCIPHERLAST

AVCLRLB const #

const AVCLRLB

AVCLRRB const #

const AVCLRRB

AVCLZ const #

const AVCLZ

AVCLZB const #

const AVCLZB

AVCLZD const #

const AVCLZD

AVCLZDM const #

const AVCLZDM

AVCLZH const #

const AVCLZH

AVCLZLSBB const #

const AVCLZLSBB

AVCLZW const #

const AVCLZW

AVCMPEQ const #

const AVCMPEQ

AVCMPEQUB const #

const AVCMPEQUB

AVCMPEQUBCC const #

const AVCMPEQUBCC

AVCMPEQUD const #

const AVCMPEQUD

AVCMPEQUDCC const #

const AVCMPEQUDCC

AVCMPEQUH const #

const AVCMPEQUH

AVCMPEQUHCC const #

const AVCMPEQUHCC

AVCMPEQUQ const #

const AVCMPEQUQ

AVCMPEQUQCC const #

const AVCMPEQUQCC

AVCMPEQUW const #

const AVCMPEQUW

AVCMPEQUWCC const #

const AVCMPEQUWCC

AVCMPGT const #

const AVCMPGT

AVCMPGTSB const #

const AVCMPGTSB

AVCMPGTSBCC const #

const AVCMPGTSBCC

AVCMPGTSD const #

const AVCMPGTSD

AVCMPGTSDCC const #

const AVCMPGTSDCC

AVCMPGTSH const #

const AVCMPGTSH

AVCMPGTSHCC const #

const AVCMPGTSHCC

AVCMPGTSQ const #

const AVCMPGTSQ

AVCMPGTSQCC const #

const AVCMPGTSQCC

AVCMPGTSW const #

const AVCMPGTSW

AVCMPGTSWCC const #

const AVCMPGTSWCC

AVCMPGTUB const #

const AVCMPGTUB

AVCMPGTUBCC const #

const AVCMPGTUBCC

AVCMPGTUD const #

const AVCMPGTUD

AVCMPGTUDCC const #

const AVCMPGTUDCC

AVCMPGTUH const #

const AVCMPGTUH

AVCMPGTUHCC const #

const AVCMPGTUHCC

AVCMPGTUQ const #

const AVCMPGTUQ

AVCMPGTUQCC const #

const AVCMPGTUQCC

AVCMPGTUW const #

const AVCMPGTUW

AVCMPGTUWCC const #

const AVCMPGTUWCC

AVCMPNEB const #

const AVCMPNEB

AVCMPNEBCC const #

const AVCMPNEBCC

AVCMPNEH const #

const AVCMPNEH

AVCMPNEHCC const #

const AVCMPNEHCC

AVCMPNEW const #

const AVCMPNEW

AVCMPNEWCC const #

const AVCMPNEWCC

AVCMPNEZB const #

const AVCMPNEZB

AVCMPNEZBCC const #

const AVCMPNEZBCC

AVCMPSQ const #

const AVCMPSQ

AVCMPUQ const #

const AVCMPUQ

AVCNTMBB const #

const AVCNTMBB

AVCNTMBD const #

const AVCNTMBD

AVCNTMBH const #

const AVCNTMBH

AVCNTMBW const #

const AVCNTMBW

AVCTZDM const #

const AVCTZDM

AVCTZLSBB const #

const AVCTZLSBB

AVDIVESD const #

const AVDIVESD

AVDIVESQ const #

const AVDIVESQ

AVDIVESW const #

const AVDIVESW

AVDIVEUD const #

const AVDIVEUD

AVDIVEUQ const #

const AVDIVEUQ

AVDIVEUW const #

const AVDIVEUW

AVDIVSD const #

const AVDIVSD

AVDIVSQ const #

const AVDIVSQ

AVDIVSW const #

const AVDIVSW

AVDIVUD const #

const AVDIVUD

AVDIVUQ const #

const AVDIVUQ

AVDIVUW const #

const AVDIVUW

AVEQV const #

const AVEQV

AVEXPANDBM const #

const AVEXPANDBM

AVEXPANDDM const #

const AVEXPANDDM

AVEXPANDHM const #

const AVEXPANDHM

AVEXPANDQM const #

const AVEXPANDQM

AVEXPANDWM const #

const AVEXPANDWM

AVEXTDDVLX const #

const AVEXTDDVLX

AVEXTDDVRX const #

const AVEXTDDVRX

AVEXTDUBVLX const #

const AVEXTDUBVLX

AVEXTDUBVRX const #

const AVEXTDUBVRX

AVEXTDUHVLX const #

const AVEXTDUHVLX

AVEXTDUHVRX const #

const AVEXTDUHVRX

AVEXTDUWVLX const #

const AVEXTDUWVLX

AVEXTDUWVRX const #

const AVEXTDUWVRX

AVEXTRACTBM const #

const AVEXTRACTBM

AVEXTRACTDM const #

const AVEXTRACTDM

AVEXTRACTHM const #

const AVEXTRACTHM

AVEXTRACTQM const #

const AVEXTRACTQM

AVEXTRACTWM const #

const AVEXTRACTWM

AVEXTSD2Q const #

const AVEXTSD2Q

AVGNB const #

const AVGNB

AVINSBLX const #

const AVINSBLX

AVINSBRX const #

const AVINSBRX

AVINSBVLX const #

const AVINSBVLX

AVINSBVRX const #

const AVINSBVRX

AVINSD const #

const AVINSD

AVINSDLX const #

const AVINSDLX

AVINSDRX const #

const AVINSDRX

AVINSHLX const #

const AVINSHLX

AVINSHRX const #

const AVINSHRX

AVINSHVLX const #

const AVINSHVLX

AVINSHVRX const #

const AVINSHVRX

AVINSW const #

const AVINSW

AVINSWLX const #

const AVINSWLX

AVINSWRX const #

const AVINSWRX

AVINSWVLX const #

const AVINSWVLX

AVINSWVRX const #

const AVINSWVRX

AVMODSD const #

const AVMODSD

AVMODSQ const #

const AVMODSQ

AVMODSW const #

const AVMODSW

AVMODUD const #

const AVMODUD

AVMODUQ const #

const AVMODUQ

AVMODUW const #

const AVMODUW

AVMRGEW const #

const AVMRGEW

AVMRGOW const #

const AVMRGOW

AVMSUMCUD const #

const AVMSUMCUD

AVMSUMUDM const #

const AVMSUMUDM

AVMULESB const #

const AVMULESB

AVMULESD const #

const AVMULESD

AVMULESH const #

const AVMULESH

AVMULESW const #

const AVMULESW

AVMULEUB const #

const AVMULEUB

AVMULEUD const #

const AVMULEUD

AVMULEUH const #

const AVMULEUH

AVMULEUW const #

const AVMULEUW

AVMULHSD const #

const AVMULHSD

AVMULHSW const #

const AVMULHSW

AVMULHUD const #

const AVMULHUD

AVMULHUW const #

const AVMULHUW

AVMULLD const #

const AVMULLD

AVMULOSB const #

const AVMULOSB

AVMULOSD const #

const AVMULOSD

AVMULOSH const #

const AVMULOSH

AVMULOSW const #

const AVMULOSW

AVMULOUB const #

const AVMULOUB

AVMULOUD const #

const AVMULOUD

AVMULOUH const #

const AVMULOUH

AVMULOUW const #

const AVMULOUW

AVMULUWM const #

const AVMULUWM

AVNAND const #

const AVNAND

AVNCIPH const #

const AVNCIPH

AVNCIPHER const #

const AVNCIPHER

AVNCIPHERLAST const #

const AVNCIPHERLAST

AVNOR const #

const AVNOR

AVOR const #

const AVOR

AVORC const #

const AVORC

AVPDEPD const #

const AVPDEPD

AVPERM const #

const AVPERM

AVPERMR const #

const AVPERMR

AVPERMXOR const #

const AVPERMXOR

AVPEXTD const #

const AVPEXTD

AVPMSUM const #

const AVPMSUM

AVPMSUMB const #

const AVPMSUMB

AVPMSUMD const #

const AVPMSUMD

AVPMSUMH const #

const AVPMSUMH

AVPMSUMW const #

const AVPMSUMW

AVPOPCNT const #

const AVPOPCNT

AVPOPCNTB const #

const AVPOPCNTB

AVPOPCNTD const #

const AVPOPCNTD

AVPOPCNTH const #

const AVPOPCNTH

AVPOPCNTW const #

const AVPOPCNTW

AVR const #

const AVR

AVRLB const #

const AVRLB

AVRLD const #

const AVRLD

AVRLH const #

const AVRLH

AVRLQ const #

const AVRLQ

AVRLQMI const #

const AVRLQMI

AVRLQNM const #

const AVRLQNM

AVRLW const #

const AVRLW

AVS const #

const AVS

AVSA const #

const AVSA

AVSBOX const #

const AVSBOX

AVSEL const #

const AVSEL

AVSHASIGMA const #

const AVSHASIGMA

AVSHASIGMAD const #

const AVSHASIGMAD

AVSHASIGMAW const #

const AVSHASIGMAW

AVSL const #

const AVSL

AVSLB const #

const AVSLB

AVSLD const #

const AVSLD

AVSLDBI const #

const AVSLDBI

AVSLDOI const #

const AVSLDOI

AVSLH const #

const AVSLH

AVSLO const #

const AVSLO

AVSLQ const #

const AVSLQ

AVSLW const #

const AVSLW

AVSOI const #

const AVSOI

AVSPLTB const #

const AVSPLTB

AVSPLTH const #

const AVSPLTH

AVSPLTISB const #

const AVSPLTISB

AVSPLTISH const #

const AVSPLTISH

AVSPLTISW const #

const AVSPLTISW

AVSPLTW const #

const AVSPLTW

AVSR const #

const AVSR

AVSRAB const #

const AVSRAB

AVSRAD const #

const AVSRAD

AVSRAH const #

const AVSRAH

AVSRAQ const #

const AVSRAQ

AVSRAW const #

const AVSRAW

AVSRB const #

const AVSRB

AVSRD const #

const AVSRD

AVSRDBI const #

const AVSRDBI

AVSRH const #

const AVSRH

AVSRO const #

const AVSRO

AVSRQ const #

const AVSRQ

AVSRW const #

const AVSRW

AVSTRIBL const #

const AVSTRIBL

AVSTRIBLCC const #

const AVSTRIBLCC

AVSTRIBR const #

const AVSTRIBR

AVSTRIBRCC const #

const AVSTRIBRCC

AVSTRIHL const #

const AVSTRIHL

AVSTRIHLCC const #

const AVSTRIHLCC

AVSTRIHR const #

const AVSTRIHR

AVSTRIHRCC const #

const AVSTRIHRCC

AVSUBCU const #

const AVSUBCU

AVSUBCUQ const #

const AVSUBCUQ

AVSUBCUW const #

const AVSUBCUW

AVSUBE const #

const AVSUBE

AVSUBECUQ const #

const AVSUBECUQ

AVSUBEUQM const #

const AVSUBEUQM

AVSUBSBS const #

const AVSUBSBS

AVSUBSHS const #

const AVSUBSHS

AVSUBSS const #

const AVSUBSS

AVSUBSWS const #

const AVSUBSWS

AVSUBUBM const #

const AVSUBUBM

AVSUBUBS const #

const AVSUBUBS

AVSUBUDM const #

const AVSUBUDM

AVSUBUHM const #

const AVSUBUHM

AVSUBUHS const #

const AVSUBUHS

AVSUBUM const #

const AVSUBUM

AVSUBUQM const #

const AVSUBUQM

AVSUBUS const #

const AVSUBUS

AVSUBUWM const #

const AVSUBUWM

AVSUBUWS const #

const AVSUBUWS

AVXOR const #

const AVXOR

AWORD const #

const AWORD

AXOR const #

const AXOR

AXORCC const #

const AXORCC

AXORIS const #

const AXORIS

AXSCMPEQQP const #

const AXSCMPEQQP

AXSCMPGEQP const #

const AXSCMPGEQP

AXSCMPGTQP const #

const AXSCMPGTQP

AXSCVDPSP const #

const AXSCVDPSP

AXSCVDPSPN const #

const AXSCVDPSPN

AXSCVDPSXDS const #

const AXSCVDPSXDS

AXSCVDPSXWS const #

const AXSCVDPSXWS

AXSCVDPUXDS const #

const AXSCVDPUXDS

AXSCVDPUXWS const #

const AXSCVDPUXWS

AXSCVQPSQZ const #

const AXSCVQPSQZ

AXSCVQPUQZ const #

const AXSCVQPUQZ

AXSCVSPDP const #

const AXSCVSPDP

AXSCVSPDPN const #

const AXSCVSPDPN

AXSCVSQQP const #

const AXSCVSQQP

AXSCVSXDDP const #

const AXSCVSXDDP

AXSCVSXDSP const #

const AXSCVSXDSP

AXSCVUQQP const #

const AXSCVUQQP

AXSCVUXDDP const #

const AXSCVUXDDP

AXSCVUXDSP const #

const AXSCVUXDSP

AXSMAXCQP const #

const AXSMAXCQP

AXSMAXJDP const #

const AXSMAXJDP

AXSMINCQP const #

const AXSMINCQP

AXSMINJDP const #

const AXSMINJDP

AXVBF16GER2 const #

const AXVBF16GER2

AXVBF16GER2NN const #

const AXVBF16GER2NN

AXVBF16GER2NP const #

const AXVBF16GER2NP

AXVBF16GER2PN const #

const AXVBF16GER2PN

AXVBF16GER2PP const #

const AXVBF16GER2PP

AXVCVBF16SPN const #

const AXVCVBF16SPN

AXVCVDPSP const #

const AXVCVDPSP

AXVCVDPSXDS const #

const AXVCVDPSXDS

AXVCVDPSXWS const #

const AXVCVDPSXWS

AXVCVDPUXDS const #

const AXVCVDPUXDS

AXVCVDPUXWS const #

const AXVCVDPUXWS

AXVCVSPBF16 const #

const AXVCVSPBF16

AXVCVSPDP const #

const AXVCVSPDP

AXVCVSPSXDS const #

const AXVCVSPSXDS

AXVCVSPSXWS const #

const AXVCVSPSXWS

AXVCVSPUXDS const #

const AXVCVSPUXDS

AXVCVSPUXWS const #

const AXVCVSPUXWS

AXVCVSXDDP const #

const AXVCVSXDDP

AXVCVSXDSP const #

const AXVCVSXDSP

AXVCVSXWDP const #

const AXVCVSXWDP

AXVCVSXWSP const #

const AXVCVSXWSP

AXVCVUXDDP const #

const AXVCVUXDDP

AXVCVUXDSP const #

const AXVCVUXDSP

AXVCVUXWDP const #

const AXVCVUXWDP

AXVCVUXWSP const #

const AXVCVUXWSP

AXVF16GER2 const #

const AXVF16GER2

AXVF16GER2NN const #

const AXVF16GER2NN

AXVF16GER2NP const #

const AXVF16GER2NP

AXVF16GER2PN const #

const AXVF16GER2PN

AXVF16GER2PP const #

const AXVF16GER2PP

AXVF32GER const #

const AXVF32GER

AXVF32GERNN const #

const AXVF32GERNN

AXVF32GERNP const #

const AXVF32GERNP

AXVF32GERPN const #

const AXVF32GERPN

AXVF32GERPP const #

const AXVF32GERPP

AXVF64GER const #

const AXVF64GER

AXVF64GERNN const #

const AXVF64GERNN

AXVF64GERNP const #

const AXVF64GERNP

AXVF64GERPN const #

const AXVF64GERPN

AXVF64GERPP const #

const AXVF64GERPP

AXVI16GER2 const #

const AXVI16GER2

AXVI16GER2PP const #

const AXVI16GER2PP

AXVI16GER2S const #

const AXVI16GER2S

AXVI16GER2SPP const #

const AXVI16GER2SPP

AXVI4GER8 const #

const AXVI4GER8

AXVI4GER8PP const #

const AXVI4GER8PP

AXVI8GER4 const #

const AXVI8GER4

AXVI8GER4PP const #

const AXVI8GER4PP

AXVI8GER4SPP const #

const AXVI8GER4SPP

AXVTLSBB const #

const AXVTLSBB

AXXBLENDVB const #

const AXXBLENDVB

AXXBLENDVD const #

const AXXBLENDVD

AXXBLENDVH const #

const AXXBLENDVH

AXXBLENDVW const #

const AXXBLENDVW

AXXBRD const #

const AXXBRD

AXXBRH const #

const AXXBRH

AXXBRQ const #

const AXXBRQ

AXXBRW const #

const AXXBRW

AXXEVAL const #

const AXXEVAL

AXXGENPCVBM const #

const AXXGENPCVBM

AXXGENPCVDM const #

const AXXGENPCVDM

AXXGENPCVHM const #

const AXXGENPCVHM

AXXGENPCVWM const #

const AXXGENPCVWM

AXXLAND const #

const AXXLAND

AXXLANDC const #

const AXXLANDC

AXXLEQV const #

const AXXLEQV

AXXLNAND const #

const AXXLNAND

AXXLNOR const #

const AXXLNOR

AXXLOR const #

const AXXLOR

AXXLORC const #

const AXXLORC

AXXLORQ const #

const AXXLORQ

AXXLXOR const #

const AXXLXOR

AXXMFACC const #

const AXXMFACC

AXXMRGHW const #

const AXXMRGHW

AXXMRGLW const #

const AXXMRGLW

AXXMTACC const #

const AXXMTACC

AXXPERM const #

const AXXPERM

AXXPERMDI const #

const AXXPERMDI

AXXPERMX const #

const AXXPERMX

AXXSEL const #

const AXXSEL

AXXSETACCZ const #

const AXXSETACCZ = *ast.BinaryExpr

AXXSLDWI const #

const AXXSLDWI

AXXSPLTI32DX const #

const AXXSPLTI32DX

AXXSPLTIB const #

const AXXSPLTIB

AXXSPLTIDP const #

const AXXSPLTIDP

AXXSPLTIW const #

const AXXSPLTIW

AXXSPLTW const #

const AXXSPLTW

Anames var #

var Anames = []string{...}

BIG const #

* GENERAL: * * compiler allocates R3 up as temps * compiler allocates register variables R7-R27 * compiler allocates external registers R30 down * * compiler allocates register variables F17-F26 * compiler allocates external registers F26 down

const BIG = *ast.BinaryExpr

BI_CR0 const #

const BI_CR0 = 0

BI_CR1 const #

const BI_CR1 = 4

BI_CR2 const #

const BI_CR2 = 8

BI_CR3 const #

const BI_CR3 = 12

BI_CR4 const #

const BI_CR4 = 16

BI_CR5 const #

const BI_CR5 = 20

BI_CR6 const #

const BI_CR6 = 24

BI_CR7 const #

const BI_CR7 = 28

BI_EQ const #

const BI_EQ = 2

BI_FU const #

const BI_FU = 3

BI_GT const #

const BI_GT = 1

BI_LT const #

const BI_LT = 0

BO_ALWAYS const #

const BO_ALWAYS = 20

BO_BCR const #

const BO_BCR = 12

BO_BCRBCTR const #

const BO_BCRBCTR = 8

BO_BCTR const #

const BO_BCTR = 16

BO_NOTBCR const #

const BO_NOTBCR = 4

BO_NOTBCTR const #

const BO_NOTBCTR = 18

BRANCH const #

const BRANCH = *ast.BinaryExpr

C_16CON const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_16CON

C_32CON const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_32CON

C_64CON const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_64CON

C_ADDR const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_ADDR

C_ANY const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_ANY

C_AREG const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_AREG

C_BRA const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_BRA

C_BRAPIC const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_BRAPIC

C_COND_EQ const #

const C_COND_EQ

C_COND_GT const #

const C_COND_GT

C_COND_LT const #

const C_COND_LT = iota

C_COND_SO const #

const C_COND_SO

C_CRBIT const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_CRBIT

C_CREG const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_CREG

C_CTR const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_CTR

C_DACON const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_DACON

C_FPSCR const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_FPSCR

C_FREG const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_FREG

C_FREGP const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_FREGP

C_GOK const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_GOK

C_LACON const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_LACON

C_LOREG const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_LOREG

C_LR const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_LR

C_NCLASS const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_NCLASS

C_NONE const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_NONE = iota

C_REG const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_REG

C_REGP const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_REGP

C_S16CON const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_S16CON

C_S32CON const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_S32CON

C_S34CON const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_S34CON

C_SACON const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_SACON

C_SOREG const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_SOREG

C_SPR const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_SPR

C_TEXTSIZE const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_TEXTSIZE

C_TLS_IE const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_TLS_IE

C_TLS_LE const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_TLS_LE

C_U15CON const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_U15CON

C_U16CON const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_U16CON

C_U1CON const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_U1CON

C_U2CON const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_U2CON

C_U31CON const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_U31CON

C_U32CON const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_U32CON

C_U3CON const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_U3CON

C_U4CON const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_U4CON

C_U5CON const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_U5CON

C_U8CON const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_U8CON

C_VREG const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_VREG

C_VSREG const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_VSREG

C_VSREGP const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_VSREGP

C_XOREG const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_XOREG

C_ZCON const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_ZCON

C_ZOREG const #

go:generate go run ../mkcnames.go -i a.out.go -o anames9.go -p ppc64

const C_ZOREG

DS_FORM const #

const DS_FORM

D_FORM const #

const D_FORM = iota

FCMP const #

const FCMP = *ast.BinaryExpr

FLOAT const #

const FLOAT = *ast.BinaryExpr

FOLL const #

const FOLL = *ast.BinaryExpr

FREGEXT const #

const FREGEXT = REG_F26

FREGMAX const #

const FREGMAX = REG_F26

FREGMIN const #

const FREGMIN = REG_F17

FREGRET const #

const FREGRET = REG_F0

GenAnames var #

var GenAnames = []string{...}

GenOpcodes var #

var GenOpcodes = [...]uint32{...}

GenPfxOpcodes var #

var GenPfxOpcodes = [...]uint32{...}

LABEL const #

mark flags

const LABEL = *ast.BinaryExpr

LEAF const #

const LEAF = *ast.BinaryExpr

LIST const #

const LIST = *ast.BinaryExpr

LOAD const #

const LOAD = *ast.BinaryExpr

Linkppc64 var #

var Linkppc64 = obj.LinkArch{...}

Linkppc64le var #

var Linkppc64le = obj.LinkArch{...}

NFREG const #

* powerpc 64

const NFREG = 32

NOP const #

The preferred hardware nop instruction.

const NOP = 0x60000000

NOSCHED const #

const NOSCHED = *ast.BinaryExpr

NREG const #

* powerpc 64

const NREG = 32

NSNAME const #

* powerpc 64

const NSNAME = 8

NSYM const #

* powerpc 64

const NSYM = 50

OP_ADD const #

each rhs is OPVCC(_, _, _, _)

const OP_ADD = *ast.BinaryExpr

OP_ADDI const #

const OP_ADDI = *ast.BinaryExpr

OP_ADDIS const #

const OP_ADDIS = *ast.BinaryExpr

OP_ANDI const #

const OP_ANDI = *ast.BinaryExpr

OP_EXTSB const #

const OP_EXTSB = *ast.BinaryExpr

OP_EXTSH const #

const OP_EXTSH = *ast.BinaryExpr

OP_EXTSW const #

const OP_EXTSW = *ast.BinaryExpr

OP_EXTSWSLI const #

const OP_EXTSWSLI = *ast.BinaryExpr

OP_ISEL const #

const OP_ISEL = *ast.BinaryExpr

OP_MCRF const #

const OP_MCRF = *ast.BinaryExpr

OP_MCRFS const #

const OP_MCRFS = *ast.BinaryExpr

OP_MCRXR const #

const OP_MCRXR = *ast.BinaryExpr

OP_MFCR const #

const OP_MFCR = *ast.BinaryExpr

OP_MFFS const #

const OP_MFFS = *ast.BinaryExpr

OP_MFSPR const #

const OP_MFSPR = *ast.BinaryExpr

OP_MFSR const #

const OP_MFSR = *ast.BinaryExpr

OP_MFSRIN const #

const OP_MFSRIN = *ast.BinaryExpr

OP_MTCRF const #

const OP_MTCRF = *ast.BinaryExpr

OP_MTFSF const #

const OP_MTFSF = *ast.BinaryExpr

OP_MTFSFI const #

const OP_MTFSFI = *ast.BinaryExpr

OP_MTSPR const #

const OP_MTSPR = *ast.BinaryExpr

OP_MTSR const #

const OP_MTSR = *ast.BinaryExpr

OP_MTSRIN const #

const OP_MTSRIN = *ast.BinaryExpr

OP_MULLD const #

const OP_MULLD = *ast.BinaryExpr

OP_MULLW const #

const OP_MULLW = *ast.BinaryExpr

OP_OR const #

const OP_OR = *ast.BinaryExpr

OP_ORI const #

const OP_ORI = *ast.BinaryExpr

OP_ORIS const #

const OP_ORIS = *ast.BinaryExpr

OP_RLDCL const #

const OP_RLDCL = *ast.BinaryExpr

OP_RLDIC const #

const OP_RLDIC = *ast.BinaryExpr

OP_RLDICL const #

const OP_RLDICL = *ast.BinaryExpr

OP_RLDICR const #

const OP_RLDICR = *ast.BinaryExpr

OP_RLWINM const #

const OP_RLWINM = *ast.BinaryExpr

OP_RLWNM const #

const OP_RLWNM = *ast.BinaryExpr

OP_SETB const #

const OP_SETB = *ast.BinaryExpr

OP_SUBF const #

const OP_SUBF = *ast.BinaryExpr

OP_XORI const #

const OP_XORI = *ast.BinaryExpr

OP_XORIS const #

const OP_XORIS = *ast.BinaryExpr

PFX_R_ABS const #

R bit option in prefixed load/store/add D-form operations

const PFX_R_ABS = 0

PFX_R_PCREL const #

const PFX_R_PCREL = 1

PFX_X64B const #

const PFX_X64B = *ast.BinaryExpr

PPC64DWARFRegisters var #

OpenPOWER ABI for Linux Supplement Power Architecture 64-Bit ELF V2 ABI https://openpowerfoundation.org/?resource_lib=64-bit-elf-v2-abi-specification-power-architecture

var PPC64DWARFRegisters = map[int16]int16{...}

REGARG const #

const REGARG = *ast.UnaryExpr

REGCTXT const #

const REGCTXT = REG_R11

REGEXT const #

const REGEXT = REG_R30

REGG const #

const REGG = REG_R30

REGMAX const #

const REGMAX = REG_R27

REGMIN const #

const REGMIN = REG_R7

REGRET const #

const REGRET = REG_R3

REGRT1 const #

const REGRT1 = REG_R20

REGRT2 const #

const REGRT2 = REG_R21

REGSB const #

const REGSB = REG_R2

REGSP const #

const REGSP = REG_R1

REGTLS const #

const REGTLS = REG_R13

REGTMP const #

const REGTMP = REG_R31

REGZERO const #

const REGZERO = REG_R0

REG_A0 const #

MMA accumulator registers, these shadow VSR 0-31 e.g MMAx shadows VSRx*4-VSRx*4+3 or MMA0 shadows VSR0-VSR3

const REG_A0

REG_A1 const #

const REG_A1

REG_A2 const #

const REG_A2

REG_A3 const #

const REG_A3

REG_A4 const #

const REG_A4

REG_A5 const #

const REG_A5

REG_A6 const #

const REG_A6

REG_A7 const #

const REG_A7

REG_CR const #

const REG_CR

REG_CR0 const #

const REG_CR0

REG_CR0EQ const #

const REG_CR0EQ

REG_CR0GT const #

const REG_CR0GT

REG_CR0LT const #

CR bits. Use Book 1, chapter 2 naming for bits. Keep aligned to 32

const REG_CR0LT

REG_CR0SO const #

const REG_CR0SO

REG_CR1 const #

const REG_CR1

REG_CR1EQ const #

const REG_CR1EQ

REG_CR1GT const #

const REG_CR1GT

REG_CR1LT const #

const REG_CR1LT

REG_CR1SO const #

const REG_CR1SO

REG_CR2 const #

const REG_CR2

REG_CR2EQ const #

const REG_CR2EQ

REG_CR2GT const #

const REG_CR2GT

REG_CR2LT const #

const REG_CR2LT

REG_CR2SO const #

const REG_CR2SO

REG_CR3 const #

const REG_CR3

REG_CR3EQ const #

const REG_CR3EQ

REG_CR3GT const #

const REG_CR3GT

REG_CR3LT const #

const REG_CR3LT

REG_CR3SO const #

const REG_CR3SO

REG_CR4 const #

const REG_CR4

REG_CR4EQ const #

const REG_CR4EQ

REG_CR4GT const #

const REG_CR4GT

REG_CR4LT const #

const REG_CR4LT

REG_CR4SO const #

const REG_CR4SO

REG_CR5 const #

const REG_CR5

REG_CR5EQ const #

const REG_CR5EQ

REG_CR5GT const #

const REG_CR5GT

REG_CR5LT const #

const REG_CR5LT

REG_CR5SO const #

const REG_CR5SO

REG_CR6 const #

const REG_CR6

REG_CR6EQ const #

const REG_CR6EQ

REG_CR6GT const #

const REG_CR6GT

REG_CR6LT const #

const REG_CR6LT

REG_CR6SO const #

const REG_CR6SO

REG_CR7 const #

const REG_CR7

REG_CR7EQ const #

const REG_CR7EQ

REG_CR7GT const #

const REG_CR7GT

REG_CR7LT const #

const REG_CR7LT

REG_CR7SO const #

const REG_CR7SO

REG_CRBIT0 const #

const REG_CRBIT0 = REG_CR0LT

REG_CTR const #

const REG_CTR = *ast.BinaryExpr

REG_F0 const #

Align FPR and VSR vectors such that when masked with 0x3F they produce an equivalent VSX register. F0=4160 ... F31=4191

const REG_F0

REG_F1 const #

const REG_F1

REG_F10 const #

const REG_F10

REG_F11 const #

const REG_F11

REG_F12 const #

const REG_F12

REG_F13 const #

const REG_F13

REG_F14 const #

const REG_F14

REG_F15 const #

const REG_F15

REG_F16 const #

const REG_F16

REG_F17 const #

const REG_F17

REG_F18 const #

const REG_F18

REG_F19 const #

const REG_F19

REG_F2 const #

const REG_F2

REG_F20 const #

const REG_F20

REG_F21 const #

const REG_F21

REG_F22 const #

const REG_F22

REG_F23 const #

const REG_F23

REG_F24 const #

const REG_F24

REG_F25 const #

const REG_F25

REG_F26 const #

const REG_F26

REG_F27 const #

const REG_F27

REG_F28 const #

const REG_F28

REG_F29 const #

const REG_F29

REG_F3 const #

const REG_F3

REG_F30 const #

const REG_F30

REG_F31 const #

const REG_F31

REG_F4 const #

const REG_F4

REG_F5 const #

const REG_F5

REG_F6 const #

const REG_F6

REG_F7 const #

const REG_F7

REG_F8 const #

const REG_F8

REG_F9 const #

const REG_F9

REG_FPSCR const #

const REG_FPSCR

REG_LR const #

const REG_LR = *ast.BinaryExpr

REG_MSR const #

const REG_MSR

REG_R0 const #

RBasePPC64 = 4096 R0=4096 ... R31=4127

const REG_R0 = *ast.BinaryExpr

REG_R1 const #

const REG_R1

REG_R10 const #

const REG_R10

REG_R11 const #

const REG_R11

REG_R12 const #

const REG_R12

REG_R13 const #

const REG_R13

REG_R14 const #

const REG_R14

REG_R15 const #

const REG_R15

REG_R16 const #

const REG_R16

REG_R17 const #

const REG_R17

REG_R18 const #

const REG_R18

REG_R19 const #

const REG_R19

REG_R2 const #

const REG_R2

REG_R20 const #

const REG_R20

REG_R21 const #

const REG_R21

REG_R22 const #

const REG_R22

REG_R23 const #

const REG_R23

REG_R24 const #

const REG_R24

REG_R25 const #

const REG_R25

REG_R26 const #

const REG_R26

REG_R27 const #

const REG_R27

REG_R28 const #

const REG_R28

REG_R29 const #

const REG_R29

REG_R3 const #

const REG_R3

REG_R30 const #

const REG_R30

REG_R31 const #

const REG_R31

REG_R4 const #

const REG_R4

REG_R5 const #

const REG_R5

REG_R6 const #

const REG_R6

REG_R7 const #

const REG_R7

REG_R8 const #

const REG_R8

REG_R9 const #

const REG_R9

REG_SPECIAL const #

const REG_SPECIAL = REG_CR0

REG_SPR0 const #

const REG_SPR0 = *ast.BinaryExpr

REG_V0 const #

V0=4192 ... V31=4223

const REG_V0

REG_V1 const #

const REG_V1

REG_V10 const #

const REG_V10

REG_V11 const #

const REG_V11

REG_V12 const #

const REG_V12

REG_V13 const #

const REG_V13

REG_V14 const #

const REG_V14

REG_V15 const #

const REG_V15

REG_V16 const #

const REG_V16

REG_V17 const #

const REG_V17

REG_V18 const #

const REG_V18

REG_V19 const #

const REG_V19

REG_V2 const #

const REG_V2

REG_V20 const #

const REG_V20

REG_V21 const #

const REG_V21

REG_V22 const #

const REG_V22

REG_V23 const #

const REG_V23

REG_V24 const #

const REG_V24

REG_V25 const #

const REG_V25

REG_V26 const #

const REG_V26

REG_V27 const #

const REG_V27

REG_V28 const #

const REG_V28

REG_V29 const #

const REG_V29

REG_V3 const #

const REG_V3

REG_V30 const #

const REG_V30

REG_V31 const #

const REG_V31

REG_V4 const #

const REG_V4

REG_V5 const #

const REG_V5

REG_V6 const #

const REG_V6

REG_V7 const #

const REG_V7

REG_V8 const #

const REG_V8

REG_V9 const #

const REG_V9

REG_VS0 const #

VS0=4224 ... VS63=4287

const REG_VS0

REG_VS1 const #

const REG_VS1

REG_VS10 const #

const REG_VS10

REG_VS11 const #

const REG_VS11

REG_VS12 const #

const REG_VS12

REG_VS13 const #

const REG_VS13

REG_VS14 const #

const REG_VS14

REG_VS15 const #

const REG_VS15

REG_VS16 const #

const REG_VS16

REG_VS17 const #

const REG_VS17

REG_VS18 const #

const REG_VS18

REG_VS19 const #

const REG_VS19

REG_VS2 const #

const REG_VS2

REG_VS20 const #

const REG_VS20

REG_VS21 const #

const REG_VS21

REG_VS22 const #

const REG_VS22

REG_VS23 const #

const REG_VS23

REG_VS24 const #

const REG_VS24

REG_VS25 const #

const REG_VS25

REG_VS26 const #

const REG_VS26

REG_VS27 const #

const REG_VS27

REG_VS28 const #

const REG_VS28

REG_VS29 const #

const REG_VS29

REG_VS3 const #

const REG_VS3

REG_VS30 const #

const REG_VS30

REG_VS31 const #

const REG_VS31

REG_VS32 const #

const REG_VS32

REG_VS33 const #

const REG_VS33

REG_VS34 const #

const REG_VS34

REG_VS35 const #

const REG_VS35

REG_VS36 const #

const REG_VS36

REG_VS37 const #

const REG_VS37

REG_VS38 const #

const REG_VS38

REG_VS39 const #

const REG_VS39

REG_VS4 const #

const REG_VS4

REG_VS40 const #

const REG_VS40

REG_VS41 const #

const REG_VS41

REG_VS42 const #

const REG_VS42

REG_VS43 const #

const REG_VS43

REG_VS44 const #

const REG_VS44

REG_VS45 const #

const REG_VS45

REG_VS46 const #

const REG_VS46

REG_VS47 const #

const REG_VS47

REG_VS48 const #

const REG_VS48

REG_VS49 const #

const REG_VS49

REG_VS5 const #

const REG_VS5

REG_VS50 const #

const REG_VS50

REG_VS51 const #

const REG_VS51

REG_VS52 const #

const REG_VS52

REG_VS53 const #

const REG_VS53

REG_VS54 const #

const REG_VS54

REG_VS55 const #

const REG_VS55

REG_VS56 const #

const REG_VS56

REG_VS57 const #

const REG_VS57

REG_VS58 const #

const REG_VS58

REG_VS59 const #

const REG_VS59

REG_VS6 const #

const REG_VS6

REG_VS60 const #

const REG_VS60

REG_VS61 const #

const REG_VS61

REG_VS62 const #

const REG_VS62

REG_VS63 const #

const REG_VS63

REG_VS7 const #

const REG_VS7

REG_VS8 const #

const REG_VS8

REG_VS9 const #

const REG_VS9

REG_XER const #

const REG_XER = *ast.BinaryExpr

SYNC const #

const SYNC = *ast.BinaryExpr

buildOpCfg var #

var buildOpCfg = ""

cnames9 var #

This order should be strictly consistent to that in a.out.go.

var cnames9 = []string{...}

oprange var #

var oprange [*ast.BinaryExpr][]Optab

optab var #

optab contains an array to be sliced of accepted operand combinations for an instruction. Unused arguments and fields are not explicitly enumerated, and should not be listed for clarity. Unused arguments and values should always assume the default value for the given type. optab does not list every valid ppc64 opcode, it enumerates representative operand combinations for a class of instruction. The variable oprange indexes all valid ppc64 opcodes. oprange is initialized to point a slice within optab which contains the valid operand combinations for a given instruction. This is initialized from buildop. Likewise, each slice of optab is dynamically sorted using the ocmp Sort interface to arrange entries to minimize text size of each opcode. optab is the sorted result of combining optabBase, optabGen, and prefixableOptab.

var optab []Optab

optabBase var #

var optabBase = []Optab{...}

optabGen var #

var optabGen = []Optab{...}

pfxEnabled var #

var pfxEnabled = false

prefixableOptab var #

The prefixable optab entry contains the pseudo-opcodes which generate relocations, or may generate a more efficient sequence of instructions if a prefixed version exists (ex. paddi instead of oris/ori/add). This table is meant to transform all sequences which might be TOC-relative into an equivalent PC-relative sequence. It also encompasses several transformations which do not involve relocations, those could be separated and applied to AIX and other non-ELF targets. Likewise, the prefixed forms do not have encoding restrictions on the offset, so they are also used for static binary to allow better code generation. e.x MOVD something-byte-aligned(Rx), Ry MOVD 3(Rx), Ry is allowed when the prefixed forms are used. This requires an ISA 3.1 compatible cpu (e.g Power10), and when linking externally an ELFv2 1.5 compliant.

var prefixableOptab = []PrefixableOptab{...}

r0iszero const #

const r0iszero = 1

unaryDst var #

MMA accumulator to/from instructions are slightly ambiguous since the argument represents both source and destination, specified as an accumulator. It is treated as a unary destination to simplify the code generation in ppc64map.

var unaryDst = map[obj.As]bool{...}

xcmp var #

var xcmp [C_NCLASS][C_NCLASS]bool

Structs

Optab struct #

type Optab struct {
as obj.As
a1 uint8
a2 uint8
a3 uint8
a4 uint8
a5 uint8
a6 uint8
type_ int8
size int8
ispfx bool
asmout func(*ctxt9, *obj.Prog, *Optab, *[5]uint32)
}

PrefixableOptab struct #

These are opcodes above which may generate different sequences depending on whether prefix opcode support is available

type PrefixableOptab struct {
Optab
minGOPPC64 int
pfxsize int8
}

ctxt9 struct #

ctxt9 holds state while assembling a single function. Each function gets a fresh ctxt9. This allows for multiple functions to be safely concurrently assembled.

type ctxt9 struct {
ctxt *obj.Link
newprog obj.ProgAlloc
cursym *obj.LSym
autosize int32
instoffset int64
pc int64
}

Functions

AOP_DQ function #

DQ-form, VSR register, register + offset operands

func AOP_DQ(op uint32, xt uint32, a uint32, b uint32) uint32

AOP_EXTSWSLI function #

func AOP_EXTSWSLI(op uint32, a uint32, s uint32, sh uint32) uint32

AOP_IIRR function #

VX-form 2-register + ST + SIX operands

func AOP_IIRR(op uint32, d uint32, a uint32, sbit uint32, simm uint32) uint32

AOP_IR function #

VX-form 1-register + SIM operands

func AOP_IR(op uint32, d uint32, simm uint32) uint32

AOP_IRR function #

func AOP_IRR(op uint32, d uint32, a uint32, simm uint32) uint32

AOP_IRRR function #

VA-form 3-register + SHB operands

func AOP_IRRR(op uint32, d uint32, a uint32, b uint32, simm uint32) uint32

AOP_ISEL function #

func AOP_ISEL(op uint32, t uint32, a uint32, b uint32, bc uint32) uint32

AOP_MD function #

MD-form 2-register, 2 6-bit immediate operands

func AOP_MD(op uint32, a uint32, s uint32, sh uint32, m uint32) uint32

AOP_MDS function #

MDS-form 3-register, 1 6-bit immediate operands. rsh argument is a register.

func AOP_MDS(op uint32, to uint32, from uint32, rsh uint32, m uint32) uint32

AOP_PFX_00_8LS function #

func AOP_PFX_00_8LS(r uint32, ie uint32) uint32

AOP_PFX_10_MLS function #

func AOP_PFX_10_MLS(r uint32, ie uint32) uint32

AOP_RR function #

VX-form 2-register operands, r/none/r

func AOP_RR(op uint32, d uint32, a uint32) uint32

AOP_RRR function #

the order is dest, a/s, b/imm for both arithmetic and logical operations.

func AOP_RRR(op uint32, d uint32, a uint32, b uint32) uint32

AOP_RRRI function #

X-form, 3-register operands + EH field

func AOP_RRRI(op uint32, d uint32, a uint32, b uint32, c uint32) uint32

AOP_RRRR function #

VA-form 4-register operands

func AOP_RRRR(op uint32, d uint32, a uint32, b uint32, c uint32) uint32

AOP_VIRR function #

VX-form 2-register + UIM operands

func AOP_VIRR(op uint32, d uint32, a uint32, simm uint32) uint32

AOP_XX1 function #

XX1-form 3-register operands, 1 VSR operand

func AOP_XX1(op uint32, r uint32, a uint32, b uint32) uint32

AOP_XX2 function #

XX2-form 3-register operands, 2 VSR operands

func AOP_XX2(op uint32, xt uint32, a uint32, xb uint32) uint32

AOP_XX3 function #

XX3-form 3 VSR operands

func AOP_XX3(op uint32, xt uint32, xa uint32, xb uint32) uint32

AOP_XX3I function #

XX3-form 3 VSR operands + immediate

func AOP_XX3I(op uint32, xt uint32, xa uint32, xb uint32, c uint32) uint32

AOP_XX4 function #

XX4-form, 4 VSR operands

func AOP_XX4(op uint32, xt uint32, xa uint32, xb uint32, xc uint32) uint32

AOP_Z23I function #

Z23-form, 3-register operands + CY field

func AOP_Z23I(op uint32, d uint32, a uint32, b uint32, c uint32) uint32

ConstantToCRbit function #

func ConstantToCRbit(c int64) (int16, bool)

DRconv function #

func DRconv(a int) string

LOP_IRR function #

func LOP_IRR(op uint32, a uint32, s uint32, uimm uint32) uint32

LOP_RRR function #

func LOP_RRR(op uint32, a uint32, s uint32, b uint32) uint32

NeedTOCpointer function #

Determine if the build configuration requires a TOC pointer. It is assumed this always called after buildop.

func NeedTOCpointer(ctxt *obj.Link) bool

OPCC function #

func OPCC(o uint32, xo uint32, rc uint32) uint32

OPDQ function #

func OPDQ(o uint32, xo uint32, oe uint32) uint32

OPMD function #

Generate MD-form opcode

func OPMD(o uint32, xo uint32, rc uint32) uint32

OPVC function #

func OPVC(o uint32, xo uint32, oe uint32, rc uint32) uint32

OPVCC function #

func OPVCC(o uint32, xo uint32, oe uint32, rc uint32) uint32

OPVX function #

func OPVX(o uint32, xo uint32, oe uint32, rc uint32) uint32

OPVXX1 function #

func OPVXX1(o uint32, xo uint32, oe uint32) uint32

OPVXX2 function #

func OPVXX2(o uint32, xo uint32, oe uint32) uint32

OPVXX2VA function #

func OPVXX2VA(o uint32, xo uint32, oe uint32) uint32

OPVXX3 function #

func OPVXX3(o uint32, xo uint32, oe uint32) uint32

OPVXX4 function #

func OPVXX4(o uint32, xo uint32, oe uint32) uint32

OP_BC function #

func OP_BC(op uint32, bo uint32, bi uint32, bd uint32, aa uint32) uint32

OP_BCR function #

func OP_BCR(op uint32, bo uint32, bi uint32) uint32

OP_BR function #

func OP_BR(op uint32, li uint32, aa uint32) uint32

OP_RLW function #

func OP_RLW(op uint32, a uint32, s uint32, sh uint32, mb uint32, me uint32) uint32

aclass method #

func (c *ctxt9) aclass(a *obj.Addr) int

aclassreg method #

func (c *ctxt9) aclassreg(reg int16) int

addpad function #

padding bytes to add to align code as requested.

func addpad(pc int64, a int64, ctxt *obj.Link, cursym *obj.LSym) int

asmout function #

func asmout(c *ctxt9, p *obj.Prog, o *Optab, out *[5]uint32)

buildop function #

Build the opcode table

func buildop(ctxt *obj.Link)

cmp function #

Compare two operand types (ex C_REG, or C_U15CON) and return true if b is compatible with a. Argument comparison isn't reflexitive, so care must be taken. a is the argument type as found in optab, b is the argument as fitted by aclass.

func cmp(a int, b int) bool

convertFMOVtoXXSPLTIDP function #

Try converting FMOVD/FMOVS to XXSPLTIDP. If it is converted, return true.

func convertFMOVtoXXSPLTIDP(p *obj.Prog) bool

decodeMask32 function #

Determine the mask begin (mb) and mask end (me) values for a valid word rotate mask. A valid 32 bit mask is of the form 1+0*1+ or 0*1+0*. Note, me is inclusive.

func decodeMask32(mask uint32) (mb uint32, me uint32, valid bool)

decodeMask64 function #

Decompose a mask of contiguous bits into a begin (mb) and end (me) value. 64b mask values cannot wrap on any valid PPC64 instruction. Only masks of the form 0*1+0* are valid. Note, me is inclusive.

func decodeMask64(mask int64) (mb uint32, me uint32, valid bool)

encodePPC64RLDCMask function #

Encode a doubleword rotate mask into mb (mask begin) and me (mask end, inclusive). Note, POWER ISA labels bits in big endian order.

func encodePPC64RLDCMask(mask int64) (mb int, me int)

high16adjusted function #

func high16adjusted(d int32) uint16

init function #

func init()

init function #

func init()

isNOTOCfunc function #

Is this a symbol which should never have a TOC prologue generated? These are special functions which should not have a TOC regeneration prologue.

func isNOTOCfunc(name string) bool

isPPC64DoublewordRotateMask function #

Test if this value can encoded as a mask for li -1, rx; rlic rx,rx,sh,mb. Masks can also extend from the msb and wrap to the lsb too. That is, the valid masks are 32 bit strings of the form: 0..01..10..0 or 1..10..01..1 or 1...1

func isPPC64DoublewordRotateMask(v64 int64) bool

isint32 function #

func isint32(v int64) bool

isuint32 function #

func isuint32(v uint64) bool

loadl16 function #

Load the lower 16 bits of a constant into register r.

func loadl16(r int, d int64) uint32

loadu32 function #

Load the upper 16 bits of a 32b constant into register r.

func loadu32(r int, d int64) uint32

oclass function #

func oclass(a *obj.Addr) int

opform method #

This function determines when a non-indexed load or store is D or DS form for use in finding the size of the offset field in the instruction. The size is needed when setting the offset value in the instruction and when generating relocation for that field. DS form instructions include: ld, ldu, lwa, std, stdu. All other loads and stores with an offset field are D form. This function should only be called with the same opcodes as are handled by opstore and opload.

func (c *ctxt9) opform(insn uint32) int

opiirr method #

func (c *ctxt9) opiirr(a obj.As) uint32

opirr method #

func (c *ctxt9) opirr(a obj.As) uint32

opirrr method #

func (c *ctxt9) opirrr(a obj.As) uint32

opload method #

* load o(a),d

func (c *ctxt9) opload(a obj.As) uint32

oploadx method #

* indexed load a(b),d

func (c *ctxt9) oploadx(a obj.As) uint32

oplook method #

func (c *ctxt9) oplook(p *obj.Prog) *Optab

oprrr method #

func (c *ctxt9) oprrr(a obj.As) uint32

opset function #

Add an entry to the opcode table for a new opcode b0 with the same operand combinations as opcode a.

func opset(a obj.As, b0 obj.As)

opsetGen function #

func opsetGen(from obj.As) bool

opstore method #

* store s,o(d)

func (c *ctxt9) opstore(a obj.As) uint32

opstorex method #

* indexed store s,a(b)

func (c *ctxt9) opstorex(a obj.As) uint32

optabLess function #

Used when sorting the optab. Sorting is done in a way so that the best choice of opcode/operand combination is considered first.

func optabLess(i int, j int) bool

pfxadd function #

func pfxadd(rt int16, ra int16, r uint32, imm32 int64) (uint32, uint32)

pfxload function #

func pfxload(a obj.As, reg int16, base int16, r uint32) (uint32, uint32)

pfxstore function #

func pfxstore(a obj.As, reg int16, base int16, r uint32) (uint32, uint32)

prasm function #

func prasm(p *obj.Prog)

preprocess function #

func preprocess(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc)

progedit function #

func progedit(ctxt *obj.Link, p *obj.Prog, newprog obj.ProgAlloc)

rconv function #

func rconv(r int) string

regoff method #

func (c *ctxt9) regoff(a *obj.Addr) int32

rewriteToUseGot method #

Rewrite p, if necessary, to access global data via the global offset table.

func (c *ctxt9) rewriteToUseGot(p *obj.Prog)

rewriteToUseTOC method #

Rewrite p, if necessary, to access a symbol using its TOC anchor. This code is for AIX only.

func (c *ctxt9) rewriteToUseTOC(p *obj.Prog)

span9 function #

func span9(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc)

stacksplit method #

// instruction scheduling if(debug['Q'] == 0) return; curtext = nil; q = nil; // p - 1 q1 = firstp; // top of block o = 0; // count of instructions for(p = firstp; p != nil; p = p1) { p1 = p->link; o++; if(p->mark & NOSCHED){ if(q1 != p){ sched(q1, q); } for(; p != nil; p = p->link){ if(!(p->mark & NOSCHED)) break; q = p; } p1 = p; q1 = p; o = 0; continue; } if(p->mark & (LABEL|SYNC)) { if(q1 != p) sched(q1, q); q1 = p; o = 1; } if(p->mark & (BRANCH|SYNC)) { sched(q1, p); q1 = p1; o = 0; } if(o >= NSCHED) { sched(q1, p); q1 = p1; o = 0; } q = p; }

func (c *ctxt9) stacksplit(p *obj.Prog, framesize int32) *obj.Prog

symbolAccess method #

Encode instructions and create relocation for accessing s+d according to the instruction op with source or destination (as appropriate) register reg. The caller must call c.cursym.AddRel(c.ctxt, rel) when finished editing rel.

func (c *ctxt9) symbolAccess(s *obj.LSym, d int64, reg int16, op uint32, reuse bool) (o1 uint32, o2 uint32, rel obj.Reloc)

type_brw function #

brw RA,RS

func type_brw(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_hashchkp function #

hashchkp RB,offset(RA)

func type_hashchkp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_hashstp function #

hashstp RB,offset(RA)

func type_hashstp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_lxvkq function #

lxvkq XT,UIM

func type_lxvkq(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_lxvp function #

lxvp XTp,DQ(RA)

func type_lxvp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_lxvpx function #

lxvpx XTp,RA,RB

func type_lxvpx(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_lxvrwx function #

lxvrwx XT,RA,RB

func type_lxvrwx(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_mtvsrbmi function #

mtvsrbmi VRT,bm

func type_mtvsrbmi(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_paddi function #

paddi RT,RA,SI,R

func type_paddi(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_pextd function #

pextd RA,RS,RB

func type_pextd(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_plxssp function #

plxssp VRT,D(RA),R

func type_plxssp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_plxv function #

plxv XT,D(RA),R

func type_plxv(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_plxvp function #

plxvp XTp,D(RA),R

func type_plxvp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_pmxvf32gerpp function #

pmxvf32gerpp AT,XA,XB,XMSK,YMSK

func type_pmxvf32gerpp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_pmxvf64gerpp function #

pmxvf64gerpp AT,XAp,XB,XMSK,YMSK

func type_pmxvf64gerpp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_pmxvi16ger2spp function #

pmxvi16ger2spp AT,XA,XB,XMSK,YMSK,PMSK

func type_pmxvi16ger2spp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_pmxvi4ger8pp function #

pmxvi4ger8pp AT,XA,XB,XMSK,YMSK,PMSK

func type_pmxvi4ger8pp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_pmxvi8ger4spp function #

pmxvi8ger4spp AT,XA,XB,XMSK,YMSK,PMSK

func type_pmxvi8ger4spp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_pnop function #

pnop

func type_pnop(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_pstxssp function #

pstxssp VRS,D(RA),R

func type_pstxssp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_pstxv function #

pstxv XS,D(RA),R

func type_pstxv(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_pstxvp function #

pstxvp XSp,D(RA),R

func type_pstxvp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_setnbcr function #

setnbcr RT,BI

func type_setnbcr(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_stxvp function #

stxvp XSp,DQ(RA)

func type_stxvp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_stxvpx function #

stxvpx XSp,RA,RB

func type_stxvpx(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_stxvrwx function #

stxvrwx XS,RA,RB

func type_stxvrwx(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_vcmpuq function #

vcmpuq BF,VRA,VRB

func type_vcmpuq(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_vcntmbw function #

vcntmbw RT,VRB,MP

func type_vcntmbw(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_vgnb function #

vgnb RT,VRB,N

func type_vgnb(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_vinsw function #

vinsw VRT,RB,UIM

func type_vinsw(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_vmsumcud function #

vmsumcud VRT,VRA,VRB,VRC

func type_vmsumcud(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_vsrdbi function #

vsrdbi VRT,VRA,VRB,SH

func type_vsrdbi(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_xscvuqqp function #

xscvuqqp VRT,VRB

func type_xscvuqqp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_xsmincqp function #

xsmincqp VRT,VRA,VRB

func type_xsmincqp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_xvcvspbf16 function #

xvcvspbf16 XT,XB

func type_xvcvspbf16(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_xvi8ger4spp function #

xvi8ger4spp AT,XA,XB

func type_xvi8ger4spp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_xvtlsbb function #

xvtlsbb BF,XB

func type_xvtlsbb(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_xxblendvw function #

xxblendvw XT,XA,XB,XC

func type_xxblendvw(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_xxeval function #

xxeval XT,XA,XB,XC,IMM

func type_xxeval(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_xxgenpcvwm function #

xxgenpcvwm XT,VRB,IMM

func type_xxgenpcvwm(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_xxpermx function #

xxpermx XT,XA,XB,XC,UIM

func type_xxpermx(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_xxsetaccz function #

xxsetaccz AT

func type_xxsetaccz(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_xxsplti32dx function #

xxsplti32dx XT,IX,IMM32

func type_xxsplti32dx(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

type_xxspltiw function #

xxspltiw XT,IMM32

func type_xxspltiw(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32)

vregoff method #

func (c *ctxt9) vregoff(a *obj.Addr) int64

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