"cmd/internal/obj"
"fmt"
"cmd/internal/obj"
"cmd/internal/objabi"
"cmd/internal/src"
"cmd/internal/sys"
"internal/abi"
"log"
"math"
"path"
"strings"
"cmd/internal/obj"
"cmd/internal/obj"
"cmd/internal/obj"
"errors"
"fmt"
"strings"
"cmd/internal/obj"
"cmd/internal/objabi"
"cmd/internal/src"
"encoding/base64"
"fmt"
"math"
"cmd/internal/obj"
"cmd/internal/obj"
"cmd/internal/objabi"
"cmd/internal/sys"
"encoding/binary"
"fmt"
"internal/buildcfg"
"log"
"strings"
const AAAA = *ast.BinaryExprconst AAADconst AAAMconst AAASconst AADCBconst AADCLconst AADCQconst AADCWconst AADCXLconst AADCXQconst AADDBconst AADDLconst AADDPDconst AADDPSconst AADDQconst AADDSDconst AADDSSconst AADDSUBPDconst AADDSUBPSconst AADDWconst AADJSPconst AADOXLconst AADOXQconst AAESDECconst AAESDECLASTconst AAESENCconst AAESENCLASTconst AAESIMCconst AAESKEYGENASSISTconst AANDBconst AANDLconst AANDNLconst AANDNPDconst AANDNPSconst AANDNQconst AANDPDconst AANDPSconst AANDQconst AANDWconst AARPLconst ABEXTRLconst ABEXTRQconst ABLENDPDconst ABLENDPSconst ABLENDVPDconst ABLENDVPSconst ABLSILconst ABLSIQconst ABLSMSKLconst ABLSMSKQconst ABLSRLconst ABLSRQconst ABOUNDLconst ABOUNDWconst ABSFLconst ABSFQconst ABSFWconst ABSRLconst ABSRQconst ABSRWconst ABSWAPLconst ABSWAPQconst ABTCLconst ABTCQconst ABTCWconst ABTLconst ABTQconst ABTRLconst ABTRQconst ABTRWconst ABTSLconst ABTSQconst ABTSWconst ABTWconst ABYTEconst ABZHILconst ABZHIQconst ACBWconst ACDQconst ACDQEconst ACLACconst ACLCconst ACLDconst ACLDEMOTEconst ACLFLUSHconst ACLFLUSHOPTconst ACLIconst ACLTSconst ACLWBconst ACMCconst ACMOVLCCconst ACMOVLCSconst ACMOVLEQconst ACMOVLGEconst ACMOVLGTconst ACMOVLHIconst ACMOVLLEconst ACMOVLLSconst ACMOVLLTconst ACMOVLMIconst ACMOVLNEconst ACMOVLOCconst ACMOVLOSconst ACMOVLPCconst ACMOVLPLconst ACMOVLPSconst ACMOVQCCconst ACMOVQCSconst ACMOVQEQconst ACMOVQGEconst ACMOVQGTconst ACMOVQHIconst ACMOVQLEconst ACMOVQLSconst ACMOVQLTconst ACMOVQMIconst ACMOVQNEconst ACMOVQOCconst ACMOVQOSconst ACMOVQPCconst ACMOVQPLconst ACMOVQPSconst ACMOVWCCconst ACMOVWCSconst ACMOVWEQconst ACMOVWGEconst ACMOVWGTconst ACMOVWHIconst ACMOVWLEconst ACMOVWLSconst ACMOVWLTconst ACMOVWMIconst ACMOVWNEconst ACMOVWOCconst ACMOVWOSconst ACMOVWPCconst ACMOVWPLconst ACMOVWPSconst ACMPBconst ACMPLconst ACMPPDconst ACMPPSconst ACMPQconst ACMPSBconst ACMPSDconst ACMPSLconst ACMPSQconst ACMPSSconst ACMPSWconst ACMPWconst ACMPXCHG16Bconst ACMPXCHG8Bconst ACMPXCHGBconst ACMPXCHGLconst ACMPXCHGQconst ACMPXCHGWconst ACOMISDconst ACOMISSconst ACPUIDconst ACQOconst ACRC32Bconst ACRC32Lconst ACRC32Qconst ACRC32Wconst ACVTPD2PLconst ACVTPD2PSconst ACVTPL2PDconst ACVTPL2PSconst ACVTPS2PDconst ACVTPS2PLconst ACVTSD2SLconst ACVTSD2SQconst ACVTSD2SSconst ACVTSL2SDconst ACVTSL2SSconst ACVTSQ2SDconst ACVTSQ2SSconst ACVTSS2SDconst ACVTSS2SLconst ACVTSS2SQconst ACVTTPD2PLconst ACVTTPS2PLconst ACVTTSD2SLconst ACVTTSD2SQconst ACVTTSS2SLconst ACVTTSS2SQconst ACWDconst ACWDEconst ADAAconst ADASconst ADECBconst ADECLconst ADECQconst ADECWconst ADIVBconst ADIVLconst ADIVPDconst ADIVPSconst ADIVQconst ADIVSDconst ADIVSSconst ADIVWconst ADPPDconst ADPPSconst AEMMSconst AENTERconst AEXTRACTPSconst AF2XM1const AFABSconst AFADDDconst AFADDDPconst AFADDFconst AFADDLconst AFADDWconst AFBLDconst AFBSTPconst AFCHSconst AFCLEXconst AFCMOVBconst AFCMOVBEconst AFCMOVCCconst AFCMOVCSconst AFCMOVEconst AFCMOVEQconst AFCMOVHIconst AFCMOVLSconst AFCMOVNBconst AFCMOVNBEconst AFCMOVNEconst AFCMOVNUconst AFCMOVUconst AFCMOVUNconst AFCOMDconst AFCOMDPconst AFCOMDPPconst AFCOMFconst AFCOMFPconst AFCOMIconst AFCOMIPconst AFCOMLconst AFCOMLPconst AFCOMWconst AFCOMWPconst AFCOSconst AFDECSTPconst AFDIVDconst AFDIVDPconst AFDIVFconst AFDIVLconst AFDIVRDconst AFDIVRDPconst AFDIVRFconst AFDIVRLconst AFDIVRWconst AFDIVWconst AFFREEconst AFINCSTPconst AFINITconst AFLD1const AFLDCWconst AFLDENVconst AFLDL2Econst AFLDL2Tconst AFLDLG2const AFLDLN2const AFLDPIconst AFLDZconst AFMOVBconst AFMOVBPconst AFMOVDconst AFMOVDPconst AFMOVFconst AFMOVFPconst AFMOVLconst AFMOVLPconst AFMOVVconst AFMOVVPconst AFMOVWconst AFMOVWPconst AFMOVXconst AFMOVXPconst AFMULDconst AFMULDPconst AFMULFconst AFMULLconst AFMULWconst AFNOPconst AFPATANconst AFPREMconst AFPREM1const AFPTANconst AFRNDINTconst AFRSTORconst AFSAVEconst AFSCALEconst AFSINconst AFSINCOSconst AFSQRTconst AFSTCWconst AFSTENVconst AFSTSWconst AFSUBDconst AFSUBDPconst AFSUBFconst AFSUBLconst AFSUBRDconst AFSUBRDPconst AFSUBRFconst AFSUBRLconst AFSUBRWconst AFSUBWconst AFTSTconst AFUCOMconst AFUCOMIconst AFUCOMIPconst AFUCOMPconst AFUCOMPPconst AFXAMconst AFXCHDconst AFXRSTORconst AFXRSTOR64const AFXSAVEconst AFXSAVE64const AFXTRACTconst AFYL2Xconst AFYL2XP1const AHADDPDconst AHADDPSconst AHLTconst AHSUBPDconst AHSUBPSconst AICEBPconst AIDIVBconst AIDIVLconst AIDIVQconst AIDIVWconst AIMUL3Lconst AIMUL3Qconst AIMUL3Wconst AIMULBconst AIMULLconst AIMULQconst AIMULWconst AINBconst AINCBconst AINCLconst AINCQconst AINCWconst AINLconst AINSBconst AINSERTPSconst AINSLconst AINSWconst AINTconst AINTOconst AINVDconst AINVLPGconst AINVPCIDconst AINWconst AIRETLconst AIRETQconst AIRETWconst AJCCconst AJCSconst AJCXZLconst AJCXZQconst AJCXZWconst AJEQconst AJGEconst AJGTconst AJHIconst AJLEconst AJLSconst AJLTconst AJMIconst AJNEconst AJOCconst AJOSconst AJPCconst AJPLconst AJPSconst AKADDBconst AKADDDconst AKADDQconst AKADDWconst AKANDBconst AKANDDconst AKANDNBconst AKANDNDconst AKANDNQconst AKANDNWconst AKANDQconst AKANDWconst AKMOVBconst AKMOVDconst AKMOVQconst AKMOVWconst AKNOTBconst AKNOTDconst AKNOTQconst AKNOTWconst AKORBconst AKORDconst AKORQconst AKORTESTBconst AKORTESTDconst AKORTESTQconst AKORTESTWconst AKORWconst AKSHIFTLBconst AKSHIFTLDconst AKSHIFTLQconst AKSHIFTLWconst AKSHIFTRBconst AKSHIFTRDconst AKSHIFTRQconst AKSHIFTRWconst AKTESTBconst AKTESTDconst AKTESTQconst AKTESTWconst AKUNPCKBWconst AKUNPCKDQconst AKUNPCKWDconst AKXNORBconst AKXNORDconst AKXNORQconst AKXNORWconst AKXORBconst AKXORDconst AKXORQconst AKXORWconst ALAHFconst ALARLconst ALARQconst ALARWconst ALASTconst ALDDQUconst ALDMXCSRconst ALEALconst ALEAQconst ALEAVELconst ALEAVEQconst ALEAVEWconst ALEAWconst ALFENCEconst ALFSLconst ALFSQconst ALFSWconst ALGDTconst ALGSLconst ALGSQconst ALGSWconst ALIDTconst ALLDTconst ALMSWconst ALOCKconst ALODSBconst ALODSLconst ALODSQconst ALODSWconst ALONGconst ALOOPconst ALOOPEQconst ALOOPNEconst ALSLLconst ALSLQconst ALSLWconst ALSSLconst ALSSQconst ALSSWconst ALTRconst ALZCNTLconst ALZCNTQconst ALZCNTWconst AMASKMOVOUconst AMASKMOVQconst AMAXPDconst AMAXPSconst AMAXSDconst AMAXSShttps://www.uclibc.org/docs/psABI-x86_64.pdf, figure 3.36
var AMD64DWARFRegisters = map[int16]int16{...}const AMFENCEconst AMINPDconst AMINPSconst AMINSDconst AMINSSconst AMONITORconst AMOVAPDconst AMOVAPSconst AMOVBconst AMOVBELconst AMOVBEQconst AMOVBEWconst AMOVBLSXconst AMOVBLZXconst AMOVBQSXconst AMOVBQZXconst AMOVBWSXconst AMOVBWZXconst AMOVDDUPconst AMOVHLPSconst AMOVHPDconst AMOVHPSconst AMOVLconst AMOVLHPSconst AMOVLPDconst AMOVLPSconst AMOVLQSXconst AMOVLQZXconst AMOVMSKPDconst AMOVMSKPSconst AMOVNTDQAconst AMOVNTILconst AMOVNTIQconst AMOVNTOconst AMOVNTPDconst AMOVNTPSconst AMOVNTQconst AMOVOconst AMOVOUconst AMOVQconst AMOVQLconst AMOVQOZXconst AMOVSBconst AMOVSDconst AMOVSHDUPconst AMOVSLconst AMOVSLDUPconst AMOVSQconst AMOVSSconst AMOVSWconst AMOVSWWconst AMOVUPDconst AMOVUPSconst AMOVWconst AMOVWLSXconst AMOVWLZXconst AMOVWQSXconst AMOVWQZXconst AMOVZWWconst AMPSADBWconst AMULBconst AMULLconst AMULPDconst AMULPSconst AMULQconst AMULSDconst AMULSSconst AMULWconst AMULXLconst AMULXQconst AMWAITconst ANEGBconst ANEGLconst ANEGQconst ANEGWconst ANOPLconst ANOPWconst ANOTBconst ANOTLconst ANOTQconst ANOTWconst AORBconst AORLconst AORPDconst AORPSconst AORQconst AORWconst AOUTBconst AOUTLconst AOUTSBconst AOUTSLconst AOUTSWconst AOUTWconst APABSBconst APABSDconst APABSWconst APACKSSLWconst APACKSSWBconst APACKUSDWconst APACKUSWBconst APADDBconst APADDLconst APADDQconst APADDSBconst APADDSWconst APADDUSBconst APADDUSWconst APADDWconst APALIGNRconst APANDconst APANDNconst APAUSEconst APAVGBconst APAVGWconst APBLENDVBconst APBLENDWconst APCLMULQDQconst APCMPEQBconst APCMPEQLconst APCMPEQQconst APCMPEQWconst APCMPESTRIconst APCMPESTRMconst APCMPGTBconst APCMPGTLconst APCMPGTQconst APCMPGTWconst APCMPISTRIconst APCMPISTRMconst APDEPLconst APDEPQconst APEXTLconst APEXTQconst APEXTRBconst APEXTRDconst APEXTRQconst APEXTRWconst APHADDDconst APHADDSWconst APHADDWconst APHMINPOSUWconst APHSUBDconst APHSUBSWconst APHSUBWconst APINSRBconst APINSRDconst APINSRQconst APINSRWconst APMADDUBSWconst APMADDWLconst APMAXSBconst APMAXSDconst APMAXSWconst APMAXUBconst APMAXUDconst APMAXUWconst APMINSBconst APMINSDconst APMINSWconst APMINUBconst APMINUDconst APMINUWconst APMOVMSKBconst APMOVSXBDconst APMOVSXBQconst APMOVSXBWconst APMOVSXDQconst APMOVSXWDconst APMOVSXWQconst APMOVZXBDconst APMOVZXBQconst APMOVZXBWconst APMOVZXDQconst APMOVZXWDconst APMOVZXWQconst APMULDQconst APMULHRSWconst APMULHUWconst APMULHWconst APMULLDconst APMULLWconst APMULULQconst APOPALconst APOPAWconst APOPCNTLconst APOPCNTQconst APOPCNTWconst APOPFLconst APOPFQconst APOPFWconst APOPLconst APOPQconst APOPWconst APORconst APREFETCHNTAconst APREFETCHT0const APREFETCHT1const APREFETCHT2const APSADBWconst APSHUFBconst APSHUFDconst APSHUFHWconst APSHUFLconst APSHUFLWconst APSHUFWconst APSIGNBconst APSIGNDconst APSIGNWconst APSLLLconst APSLLOconst APSLLQconst APSLLWconst APSRALconst APSRAWconst APSRLLconst APSRLOconst APSRLQconst APSRLWconst APSUBBconst APSUBLconst APSUBQconst APSUBSBconst APSUBSWconst APSUBUSBconst APSUBUSWconst APSUBWconst APTESTconst APUNPCKHBWconst APUNPCKHLQconst APUNPCKHQDQconst APUNPCKHWLconst APUNPCKLBWconst APUNPCKLLQconst APUNPCKLQDQconst APUNPCKLWLconst APUSHALconst APUSHAWconst APUSHFLconst APUSHFQconst APUSHFWconst APUSHLconst APUSHQconst APUSHWconst APXORconst AQUADconst ARCLBconst ARCLLconst ARCLQconst ARCLWconst ARCPPSconst ARCPSSconst ARCRBconst ARCRLconst ARCRQconst ARCRWconst ARDFSBASELconst ARDFSBASEQconst ARDGSBASELconst ARDGSBASEQconst ARDMSRconst ARDPIDconst ARDPKRUconst ARDPMCconst ARDRANDLconst ARDRANDQconst ARDRANDWconst ARDSEEDLconst ARDSEEDQconst ARDSEEDWconst ARDTSCconst ARDTSCPconst AREPconst AREPNconst ARETFLconst ARETFQconst ARETFWconst AROLBconst AROLLconst AROLQconst AROLWconst ARORBconst ARORLconst ARORQconst ARORWconst ARORXLconst ARORXQconst AROUNDPDconst AROUNDPSconst AROUNDSDconst AROUNDSSconst ARSMconst ARSQRTPSconst ARSQRTSSconst ASAHFconst ASALBconst ASALLconst ASALQconst ASALWconst ASARBconst ASARLconst ASARQconst ASARWconst ASARXLconst ASARXQconst ASBBBconst ASBBLconst ASBBQconst ASBBWconst ASCASBconst ASCASLconst ASCASQconst ASCASWconst ASETCCconst ASETCSconst ASETEQconst ASETGEconst ASETGTconst ASETHIconst ASETLEconst ASETLSconst ASETLTconst ASETMIconst ASETNEconst ASETOCconst ASETOSconst ASETPCconst ASETPLconst ASETPSconst ASFENCEconst ASGDTconst ASHA1MSG1const ASHA1MSG2const ASHA1NEXTEconst ASHA1RNDS4const ASHA256MSG1const ASHA256MSG2const ASHA256RNDS2const ASHLBconst ASHLLconst ASHLQconst ASHLWconst ASHLXLconst ASHLXQconst ASHRBconst ASHRLconst ASHRQconst ASHRWconst ASHRXLconst ASHRXQconst ASHUFPDconst ASHUFPSconst ASIDTconst ASLDTLconst ASLDTQconst ASLDTWconst ASMSWLconst ASMSWQconst ASMSWWconst ASQRTPDconst ASQRTPSconst ASQRTSDconst ASQRTSSconst ASTACconst ASTCconst ASTDconst ASTIconst ASTMXCSRconst ASTOSBconst ASTOSLconst ASTOSQconst ASTOSWconst ASTRLconst ASTRQconst ASTRWconst ASUBBconst ASUBLconst ASUBPDconst ASUBPSconst ASUBQconst ASUBSDconst ASUBSSconst ASUBWconst ASWAPGSconst ASYSCALLconst ASYSENTERconst ASYSENTER64const ASYSEXITconst ASYSEXIT64const ASYSRETconst ATESTBconst ATESTLconst ATESTQconst ATESTWconst ATPAUSEconst ATZCNTLconst ATZCNTQconst ATZCNTWconst AUCOMISDconst AUCOMISSconst AUD1const AUD2const AUMONITORconst AUMWAITconst AUNPCKHPDconst AUNPCKHPSconst AUNPCKLPDconst AUNPCKLPSconst AV4FMADDPSconst AV4FMADDSSconst AV4FNMADDPSconst AV4FNMADDSSconst AVADDPDconst AVADDPSconst AVADDSDconst AVADDSSconst AVADDSUBPDconst AVADDSUBPSconst AVAESDECconst AVAESDECLASTconst AVAESENCconst AVAESENCLASTconst AVAESIMCconst AVAESKEYGENASSISTconst AVALIGNDconst AVALIGNQconst AVANDNPDconst AVANDNPSconst AVANDPDconst AVANDPSconst AVBLENDMPDconst AVBLENDMPSconst AVBLENDPDconst AVBLENDPSconst AVBLENDVPDconst AVBLENDVPSconst AVBROADCASTF128const AVBROADCASTF32X2const AVBROADCASTF32X4const AVBROADCASTF32X8const AVBROADCASTF64X2const AVBROADCASTF64X4const AVBROADCASTI128const AVBROADCASTI32X2const AVBROADCASTI32X4const AVBROADCASTI32X8const AVBROADCASTI64X2const AVBROADCASTI64X4const AVBROADCASTSDconst AVBROADCASTSSconst AVCMPPDconst AVCMPPSconst AVCMPSDconst AVCMPSSconst AVCOMISDconst AVCOMISSconst AVCOMPRESSPDconst AVCOMPRESSPSconst AVCVTDQ2PDconst AVCVTDQ2PSconst AVCVTPD2DQconst AVCVTPD2DQXconst AVCVTPD2DQYconst AVCVTPD2PSconst AVCVTPD2PSXconst AVCVTPD2PSYconst AVCVTPD2QQconst AVCVTPD2UDQconst AVCVTPD2UDQXconst AVCVTPD2UDQYconst AVCVTPD2UQQconst AVCVTPH2PSconst AVCVTPS2DQconst AVCVTPS2PDconst AVCVTPS2PHconst AVCVTPS2QQconst AVCVTPS2UDQconst AVCVTPS2UQQconst AVCVTQQ2PDconst AVCVTQQ2PSconst AVCVTQQ2PSXconst AVCVTQQ2PSYconst AVCVTSD2SIconst AVCVTSD2SIQconst AVCVTSD2SSconst AVCVTSD2USIconst AVCVTSD2USILconst AVCVTSD2USIQconst AVCVTSI2SDLconst AVCVTSI2SDQconst AVCVTSI2SSLconst AVCVTSI2SSQconst AVCVTSS2SDconst AVCVTSS2SIconst AVCVTSS2SIQconst AVCVTSS2USIconst AVCVTSS2USILconst AVCVTSS2USIQconst AVCVTTPD2DQconst AVCVTTPD2DQXconst AVCVTTPD2DQYconst AVCVTTPD2QQconst AVCVTTPD2UDQconst AVCVTTPD2UDQXconst AVCVTTPD2UDQYconst AVCVTTPD2UQQconst AVCVTTPS2DQconst AVCVTTPS2QQconst AVCVTTPS2UDQconst AVCVTTPS2UQQconst AVCVTTSD2SIconst AVCVTTSD2SIQconst AVCVTTSD2USIconst AVCVTTSD2USILconst AVCVTTSD2USIQconst AVCVTTSS2SIconst AVCVTTSS2SIQconst AVCVTTSS2USIconst AVCVTTSS2USILconst AVCVTTSS2USIQconst AVCVTUDQ2PDconst AVCVTUDQ2PSconst AVCVTUQQ2PDconst AVCVTUQQ2PSconst AVCVTUQQ2PSXconst AVCVTUQQ2PSYconst AVCVTUSI2SDconst AVCVTUSI2SDLconst AVCVTUSI2SDQconst AVCVTUSI2SSconst AVCVTUSI2SSLconst AVCVTUSI2SSQconst AVDBPSADBWconst AVDIVPDconst AVDIVPSconst AVDIVSDconst AVDIVSSconst AVDPPDconst AVDPPSconst AVERRconst AVERWconst AVEXP2PDconst AVEXP2PSconst AVEXPANDPDconst AVEXPANDPSconst AVEXTRACTF128const AVEXTRACTF32X4const AVEXTRACTF32X8const AVEXTRACTF64X2const AVEXTRACTF64X4const AVEXTRACTI128const AVEXTRACTI32X4const AVEXTRACTI32X8const AVEXTRACTI64X2const AVEXTRACTI64X4const AVEXTRACTPSconst AVFIXUPIMMPDconst AVFIXUPIMMPSconst AVFIXUPIMMSDconst AVFIXUPIMMSSconst AVFMADD132PDconst AVFMADD132PSconst AVFMADD132SDconst AVFMADD132SSconst AVFMADD213PDconst AVFMADD213PSconst AVFMADD213SDconst AVFMADD213SSconst AVFMADD231PDconst AVFMADD231PSconst AVFMADD231SDconst AVFMADD231SSconst AVFMADDSUB132PDconst AVFMADDSUB132PSconst AVFMADDSUB213PDconst AVFMADDSUB213PSconst AVFMADDSUB231PDconst AVFMADDSUB231PSconst AVFMSUB132PDconst AVFMSUB132PSconst AVFMSUB132SDconst AVFMSUB132SSconst AVFMSUB213PDconst AVFMSUB213PSconst AVFMSUB213SDconst AVFMSUB213SSconst AVFMSUB231PDconst AVFMSUB231PSconst AVFMSUB231SDconst AVFMSUB231SSconst AVFMSUBADD132PDconst AVFMSUBADD132PSconst AVFMSUBADD213PDconst AVFMSUBADD213PSconst AVFMSUBADD231PDconst AVFMSUBADD231PSconst AVFNMADD132PDconst AVFNMADD132PSconst AVFNMADD132SDconst AVFNMADD132SSconst AVFNMADD213PDconst AVFNMADD213PSconst AVFNMADD213SDconst AVFNMADD213SSconst AVFNMADD231PDconst AVFNMADD231PSconst AVFNMADD231SDconst AVFNMADD231SSconst AVFNMSUB132PDconst AVFNMSUB132PSconst AVFNMSUB132SDconst AVFNMSUB132SSconst AVFNMSUB213PDconst AVFNMSUB213PSconst AVFNMSUB213SDconst AVFNMSUB213SSconst AVFNMSUB231PDconst AVFNMSUB231PSconst AVFNMSUB231SDconst AVFNMSUB231SSconst AVFPCLASSPDconst AVFPCLASSPDXconst AVFPCLASSPDYconst AVFPCLASSPDZconst AVFPCLASSPSconst AVFPCLASSPSXconst AVFPCLASSPSYconst AVFPCLASSPSZconst AVFPCLASSSDconst AVFPCLASSSSconst AVGATHERDPDconst AVGATHERDPSconst AVGATHERPF0DPDconst AVGATHERPF0DPSconst AVGATHERPF0QPDconst AVGATHERPF0QPSconst AVGATHERPF1DPDconst AVGATHERPF1DPSconst AVGATHERPF1QPDconst AVGATHERPF1QPSconst AVGATHERQPDconst AVGATHERQPSconst AVGETEXPPDconst AVGETEXPPSconst AVGETEXPSDconst AVGETEXPSSconst AVGETMANTPDconst AVGETMANTPSconst AVGETMANTSDconst AVGETMANTSSconst AVGF2P8AFFINEINVQBconst AVGF2P8AFFINEQBconst AVGF2P8MULBconst AVHADDPDconst AVHADDPSconst AVHSUBPDconst AVHSUBPSconst AVINSERTF128const AVINSERTF32X4const AVINSERTF32X8const AVINSERTF64X2const AVINSERTF64X4const AVINSERTI128const AVINSERTI32X4const AVINSERTI32X8const AVINSERTI64X2const AVINSERTI64X4const AVINSERTPSconst AVLDDQUconst AVLDMXCSRconst AVMASKMOVDQUconst AVMASKMOVPDconst AVMASKMOVPSconst AVMAXPDconst AVMAXPSconst AVMAXSDconst AVMAXSSconst AVMINPDconst AVMINPSconst AVMINSDconst AVMINSSconst AVMOVAPDconst AVMOVAPSconst AVMOVDconst AVMOVDDUPconst AVMOVDQAconst AVMOVDQA32const AVMOVDQA64const AVMOVDQUconst AVMOVDQU16const AVMOVDQU32const AVMOVDQU64const AVMOVDQU8const AVMOVHLPSconst AVMOVHPDconst AVMOVHPSconst AVMOVLHPSconst AVMOVLPDconst AVMOVLPSconst AVMOVMSKPDconst AVMOVMSKPSconst AVMOVNTDQconst AVMOVNTDQAconst AVMOVNTPDconst AVMOVNTPSconst AVMOVQconst AVMOVSDconst AVMOVSHDUPconst AVMOVSLDUPconst AVMOVSSconst AVMOVUPDconst AVMOVUPSconst AVMPSADBWconst AVMULPDconst AVMULPSconst AVMULSDconst AVMULSSconst AVORPDconst AVORPSconst AVP4DPWSSDconst AVP4DPWSSDSconst AVPABSBconst AVPABSDconst AVPABSQconst AVPABSWconst AVPACKSSDWconst AVPACKSSWBconst AVPACKUSDWconst AVPACKUSWBconst AVPADDBconst AVPADDDconst AVPADDQconst AVPADDSBconst AVPADDSWconst AVPADDUSBconst AVPADDUSWconst AVPADDWconst AVPALIGNRconst AVPANDconst AVPANDDconst AVPANDNconst AVPANDNDconst AVPANDNQconst AVPANDQconst AVPAVGBconst AVPAVGWconst AVPBLENDDconst AVPBLENDMBconst AVPBLENDMDconst AVPBLENDMQconst AVPBLENDMWconst AVPBLENDVBconst AVPBLENDWconst AVPBROADCASTBconst AVPBROADCASTDconst AVPBROADCASTMB2Qconst AVPBROADCASTMW2Dconst AVPBROADCASTQconst AVPBROADCASTWconst AVPCLMULQDQconst AVPCMPBconst AVPCMPDconst AVPCMPEQBconst AVPCMPEQDconst AVPCMPEQQconst AVPCMPEQWconst AVPCMPESTRIconst AVPCMPESTRMconst AVPCMPGTBconst AVPCMPGTDconst AVPCMPGTQconst AVPCMPGTWconst AVPCMPISTRIconst AVPCMPISTRMconst AVPCMPQconst AVPCMPUBconst AVPCMPUDconst AVPCMPUQconst AVPCMPUWconst AVPCMPWconst AVPCOMPRESSBconst AVPCOMPRESSDconst AVPCOMPRESSQconst AVPCOMPRESSWconst AVPCONFLICTDconst AVPCONFLICTQconst AVPDPBUSDconst AVPDPBUSDSconst AVPDPWSSDconst AVPDPWSSDSconst AVPERM2F128const AVPERM2I128const AVPERMBconst AVPERMDconst AVPERMI2Bconst AVPERMI2Dconst AVPERMI2PDconst AVPERMI2PSconst AVPERMI2Qconst AVPERMI2Wconst AVPERMILPDconst AVPERMILPSconst AVPERMPDconst AVPERMPSconst AVPERMQconst AVPERMT2Bconst AVPERMT2Dconst AVPERMT2PDconst AVPERMT2PSconst AVPERMT2Qconst AVPERMT2Wconst AVPERMWconst AVPEXPANDBconst AVPEXPANDDconst AVPEXPANDQconst AVPEXPANDWconst AVPEXTRBconst AVPEXTRDconst AVPEXTRQconst AVPEXTRWconst AVPGATHERDDconst AVPGATHERDQconst AVPGATHERQDconst AVPGATHERQQconst AVPHADDDconst AVPHADDSWconst AVPHADDWconst AVPHMINPOSUWconst AVPHSUBDconst AVPHSUBSWconst AVPHSUBWconst AVPINSRBconst AVPINSRDconst AVPINSRQconst AVPINSRWconst AVPLZCNTDconst AVPLZCNTQconst AVPMADD52HUQconst AVPMADD52LUQconst AVPMADDUBSWconst AVPMADDWDconst AVPMASKMOVDconst AVPMASKMOVQconst AVPMAXSBconst AVPMAXSDconst AVPMAXSQconst AVPMAXSWconst AVPMAXUBconst AVPMAXUDconst AVPMAXUQconst AVPMAXUWconst AVPMINSBconst AVPMINSDconst AVPMINSQconst AVPMINSWconst AVPMINUBconst AVPMINUDconst AVPMINUQconst AVPMINUWconst AVPMOVB2Mconst AVPMOVD2Mconst AVPMOVDBconst AVPMOVDWconst AVPMOVM2Bconst AVPMOVM2Dconst AVPMOVM2Qconst AVPMOVM2Wconst AVPMOVMSKBconst AVPMOVQ2Mconst AVPMOVQBconst AVPMOVQDconst AVPMOVQWconst AVPMOVSDBconst AVPMOVSDWconst AVPMOVSQBconst AVPMOVSQDconst AVPMOVSQWconst AVPMOVSWBconst AVPMOVSXBDconst AVPMOVSXBQconst AVPMOVSXBWconst AVPMOVSXDQconst AVPMOVSXWDconst AVPMOVSXWQconst AVPMOVUSDBconst AVPMOVUSDWconst AVPMOVUSQBconst AVPMOVUSQDconst AVPMOVUSQWconst AVPMOVUSWBconst AVPMOVW2Mconst AVPMOVWBconst AVPMOVZXBDconst AVPMOVZXBQconst AVPMOVZXBWconst AVPMOVZXDQconst AVPMOVZXWDconst AVPMOVZXWQconst AVPMULDQconst AVPMULHRSWconst AVPMULHUWconst AVPMULHWconst AVPMULLDconst AVPMULLQconst AVPMULLWconst AVPMULTISHIFTQBconst AVPMULUDQconst AVPOPCNTBconst AVPOPCNTDconst AVPOPCNTQconst AVPOPCNTWconst AVPORconst AVPORDconst AVPORQconst AVPROLDconst AVPROLQconst AVPROLVDconst AVPROLVQconst AVPRORDconst AVPRORQconst AVPRORVDconst AVPRORVQconst AVPSADBWconst AVPSCATTERDDconst AVPSCATTERDQconst AVPSCATTERQDconst AVPSCATTERQQconst AVPSHLDDconst AVPSHLDQconst AVPSHLDVDconst AVPSHLDVQconst AVPSHLDVWconst AVPSHLDWconst AVPSHRDDconst AVPSHRDQconst AVPSHRDVDconst AVPSHRDVQconst AVPSHRDVWconst AVPSHRDWconst AVPSHUFBconst AVPSHUFBITQMBconst AVPSHUFDconst AVPSHUFHWconst AVPSHUFLWconst AVPSIGNBconst AVPSIGNDconst AVPSIGNWconst AVPSLLDconst AVPSLLDQconst AVPSLLQconst AVPSLLVDconst AVPSLLVQconst AVPSLLVWconst AVPSLLWconst AVPSRADconst AVPSRAQconst AVPSRAVDconst AVPSRAVQconst AVPSRAVWconst AVPSRAWconst AVPSRLDconst AVPSRLDQconst AVPSRLQconst AVPSRLVDconst AVPSRLVQconst AVPSRLVWconst AVPSRLWconst AVPSUBBconst AVPSUBDconst AVPSUBQconst AVPSUBSBconst AVPSUBSWconst AVPSUBUSBconst AVPSUBUSWconst AVPSUBWconst AVPTERNLOGDconst AVPTERNLOGQconst AVPTESTconst AVPTESTMBconst AVPTESTMDconst AVPTESTMQconst AVPTESTMWconst AVPTESTNMBconst AVPTESTNMDconst AVPTESTNMQconst AVPTESTNMWconst AVPUNPCKHBWconst AVPUNPCKHDQconst AVPUNPCKHQDQconst AVPUNPCKHWDconst AVPUNPCKLBWconst AVPUNPCKLDQconst AVPUNPCKLQDQconst AVPUNPCKLWDconst AVPXORconst AVPXORDconst AVPXORQconst AVRANGEPDconst AVRANGEPSconst AVRANGESDconst AVRANGESSconst AVRCP14PDconst AVRCP14PSconst AVRCP14SDconst AVRCP14SSconst AVRCP28PDconst AVRCP28PSconst AVRCP28SDconst AVRCP28SSconst AVRCPPSconst AVRCPSSconst AVREDUCEPDconst AVREDUCEPSconst AVREDUCESDconst AVREDUCESSconst AVRNDSCALEPDconst AVRNDSCALEPSconst AVRNDSCALESDconst AVRNDSCALESSconst AVROUNDPDconst AVROUNDPSconst AVROUNDSDconst AVROUNDSSconst AVRSQRT14PDconst AVRSQRT14PSconst AVRSQRT14SDconst AVRSQRT14SSconst AVRSQRT28PDconst AVRSQRT28PSconst AVRSQRT28SDconst AVRSQRT28SSconst AVRSQRTPSconst AVRSQRTSSconst AVSCALEFPDconst AVSCALEFPSconst AVSCALEFSDconst AVSCALEFSSconst AVSCATTERDPDconst AVSCATTERDPSconst AVSCATTERPF0DPDconst AVSCATTERPF0DPSconst AVSCATTERPF0QPDconst AVSCATTERPF0QPSconst AVSCATTERPF1DPDconst AVSCATTERPF1DPSconst AVSCATTERPF1QPDconst AVSCATTERPF1QPSconst AVSCATTERQPDconst AVSCATTERQPSconst AVSHUFF32X4const AVSHUFF64X2const AVSHUFI32X4const AVSHUFI64X2const AVSHUFPDconst AVSHUFPSconst AVSQRTPDconst AVSQRTPSconst AVSQRTSDconst AVSQRTSSconst AVSTMXCSRconst AVSUBPDconst AVSUBPSconst AVSUBSDconst AVSUBSSconst AVTESTPDconst AVTESTPSconst AVUCOMISDconst AVUCOMISSconst AVUNPCKHPDconst AVUNPCKHPSconst AVUNPCKLPDconst AVUNPCKLPSconst AVXORPDconst AVXORPSconst AVZEROALLconst AVZEROUPPERconst AWAITconst AWBINVDconst AWORDconst AWRFSBASELconst AWRFSBASEQconst AWRGSBASELconst AWRGSBASEQconst AWRMSRconst AWRPKRUconst AXABORTconst AXACQUIREconst AXADDBconst AXADDLconst AXADDQconst AXADDWconst AXBEGINconst AXCHGBconst AXCHGLconst AXCHGQconst AXCHGWconst AXENDconst AXGETBVconst AXLATconst AXORBconst AXORLconst AXORPDconst AXORPSconst AXORQconst AXORWconst AXRELEASEconst AXRSTORconst AXRSTOR64const AXRSTORSconst AXRSTORS64const AXSAVEconst AXSAVE64const AXSAVECconst AXSAVEC64const AXSAVEOPTconst AXSAVEOPT64const AXSAVESconst AXSAVES64const AXSETBVconst AXTESTvar Anames = []string{...}const FREGEXT = *ast.BinaryExprconst FREGMIN = *ast.BinaryExprconst FREGRET = REG_X0var Link386 = obj.LinkArch{...}var Linkamd64 = obj.LinkArch{...}const MAXREGconst P32 = 0x32const Pavx = 0x84const Pb = 0xfeconst Pe = 0x66const Pef3 = 0xf5const Pf2 = 0xf2const Pf3 = 0xf3const Pfw = 0xf4const Pm = 0x0fconst Pq = 0xffconst Pq3 = 0x67const Pq4 = 0x68const Pq4w = 0x69const Pq5 = 0x6aconst Pq5w = 0x6bconst Pw = 0x48const Pw8 = 0x90const Px = 0const Px1 = 1const Py = 0x80const Py1 = 0x81const Py3 = 0x83const REGARG = *ast.UnaryExprconst REGCTXT = REG_DXconst REGENTRYTMP0 = REG_R12const REGENTRYTMP1 = REG_R13const REGEXT = REG_R15const REGG = REG_R14const REGRET = REG_AXconst REGSP = REG_SPconst REG_AHconst REG_AL = *ast.BinaryExprconst REG_AXconst REG_BHconst REG_BLconst REG_BPconst REG_BPBconst REG_BXconst REG_CHconst REG_CLconst REG_CR = REG_CR0const REG_CR0const REG_CR1const REG_CR10const REG_CR11const REG_CR12const REG_CR13const REG_CR14const REG_CR15const REG_CR2const REG_CR3const REG_CR4const REG_CR5const REG_CR6const REG_CR7const REG_CR8const REG_CR9const REG_CSconst REG_CXconst REG_DHconst REG_DIconst REG_DIBconst REG_DLconst REG_DR = REG_DR0const REG_DR0const REG_DR1const REG_DR2const REG_DR3const REG_DR4const REG_DR5const REG_DR6const REG_DR7const REG_DSconst REG_DXconst REG_ESconst REG_F0const REG_F1const REG_F2const REG_F3const REG_F4const REG_F5const REG_F6const REG_F7const REG_FSconst REG_GDTRconst REG_GSconst REG_IDTRconst REG_K0const REG_K1const REG_K2const REG_K3const REG_K4const REG_K5const REG_K6const REG_K7const REG_LDTRconst REG_M0const REG_M1const REG_M2const REG_M3const REG_M4const REG_M5const REG_M6const REG_M7const REG_MSWconst REG_NONE = 0const REG_R10const REG_R10Bconst REG_R11const REG_R11Bconst REG_R12const REG_R12Bconst REG_R13const REG_R13Bconst REG_R14const REG_R14Bconst REG_R15const REG_R15Bconst REG_R8const REG_R8Bconst REG_R9const REG_R9Bconst REG_SIconst REG_SIBconst REG_SPconst REG_SPBconst REG_SSconst REG_TASKconst REG_TLSconst REG_TR = REG_TR0const REG_TR0const REG_TR1const REG_TR2const REG_TR3const REG_TR4const REG_TR5const REG_TR6const REG_TR7const REG_X0const REG_X1const REG_X10const REG_X11const REG_X12const REG_X13const REG_X14const REG_X15const REG_X16const REG_X17const REG_X18const REG_X19const REG_X2const REG_X20const REG_X21const REG_X22const REG_X23const REG_X24const REG_X25const REG_X26const REG_X27const REG_X28const REG_X29const REG_X3const REG_X30const REG_X31const REG_X4const REG_X5const REG_X6const REG_X7const REG_X8const REG_X9const REG_Y0const REG_Y1const REG_Y10const REG_Y11const REG_Y12const REG_Y13const REG_Y14const REG_Y15const REG_Y16const REG_Y17const REG_Y18const REG_Y19const REG_Y2const REG_Y20const REG_Y21const REG_Y22const REG_Y23const REG_Y24const REG_Y25const REG_Y26const REG_Y27const REG_Y28const REG_Y29const REG_Y3const REG_Y30const REG_Y31const REG_Y4const REG_Y5const REG_Y6const REG_Y7const REG_Y8const REG_Y9const REG_Z0const REG_Z1const REG_Z10const REG_Z11const REG_Z12const REG_Z13const REG_Z14const REG_Z15const REG_Z16const REG_Z17const REG_Z18const REG_Z19const REG_Z2const REG_Z20const REG_Z21const REG_Z22const REG_Z23const REG_Z24const REG_Z25const REG_Z26const REG_Z27const REG_Z28const REG_Z29const REG_Z3const REG_Z30const REG_Z31const REG_Z4const REG_Z5const REG_Z6const REG_Z7const REG_Z8const REG_Z9var Register = []string{...}const Rxb = *ast.BinaryExprconst Rxr = *ast.BinaryExprconst RxrEvex = *ast.BinaryExprconst Rxw = *ast.BinaryExprconst Rxx = *ast.BinaryExprconst T_64 = *ast.BinaryExprconst T_FCONST = *ast.BinaryExprconst T_GOTYPE = *ast.BinaryExprconst T_INDEX = *ast.BinaryExprconst T_OFFSET = *ast.BinaryExprconst T_SCONST = *ast.BinaryExprconst T_SYM = *ast.BinaryExprconst T_TYPE = *ast.BinaryExprhttps://www.uclibc.org/docs/psABI-i386.pdf, table 2.14
var X86DWARFRegisters = map[int16]int16{...}const Yalconst Yaxconst Ybrconst Yclconst Ycr0const Ycr1const Ycr2const Ycr3const Ycr4const Ycr5const Ycr6const Ycr7const Ycr8const Ycsconst Ycxconst Ydr0const Ydr1const Ydr2const Ydr3const Ydr4const Ydr5const Ydr6const Ydr7const Ydsconst Yesconst Yf0const Yfsconst Ygdtrconst Ygsconst Yi0const Yi1const Yi32const Yi64const Yi8const Yiautoconst Yidtrconst Yindirconst Ykconst Yk0const Ykmconst Yknot0const Yldtrconst Ymconst Ymaxconst Ymbconst Ymlconst Ymmconst Ymrconst Ymswconst Ynoneconst Yrbconst Yrfconst Yrlconst Yrl32const Yrxconst Ys32const Yssconst Ytaskconst Ytextsizeconst Ytlsconst Ytr0const Ytr1const Ytr2const Ytr3const Ytr4const Ytr5const Ytr6const Ytr7const Yu2const Yu7const Yu8const Yxmconst YxmEvexconst Yxrconst Yxr0const YxrEvexconst YxrEvexMulti4const Yxvmconst YxvmEvexconst Yxxx = iotaconst Yymconst YymEvexconst Yyrconst YyrEvexconst YyrEvexMulti4const Yyvmconst YyvmEvexconst Yzmconst Yzrconst YzrMulti4const Yzvmconst Z_ibconst Z_ilconst Z_m_rconst Z_rpconst Zaut_rconst Zbrconst Zbyteconst Zcallconst Zcallconconst Zcallduffconst Zcallindconst Zcallindregconst Zevex_firstconst Zevex_i_r_k_rmconst Zevex_i_r_rmconst Zevex_i_rm_k_rconst Zevex_i_rm_k_voconst Zevex_i_rm_rconst Zevex_i_rm_v_k_rconst Zevex_i_rm_v_rconst Zevex_i_rm_voconst Zevex_k_rmoconst Zevex_lastconst Zevex_r_k_rmconst Zevex_r_v_k_rmconst Zevex_r_v_rmconst Zevex_rm_k_rconst Zevex_rm_v_k_rconst Zevex_rm_v_rconst Zib_const Zib_rpconst Zib_rrconst Zibm_rconst Zibo_mconst Zibo_m_xmconst Zibr_mconst Zil_const Zil_rpconst Zil_rrconst Zilo_mconst Ziq_rpconst Zjmpconst Zjmpconconst Zlitconst Zlit_m_rconst Zlitm_rconst Zlitr_mconst Zloopconst Zm2_rconst Zm_iboconst Zm_iloconst Zm_oconst Zm_rconst Zm_r_i_xmconst Zm_r_xmconst Zm_r_xm_nrconst Zmaxconst Zmb_rconst Zo_iwconst Zo_mconst Zo_m64const Zpseudoconst Zr_mconst Zr_m_xmconst Zr_m_xm_nrconst Zrp_const Zvexconst Zvex_hr_rm_v_rconst Zvex_i_r_rmconst Zvex_i_r_vconst Zvex_i_rm_rconst Zvex_i_rm_v_rconst Zvex_i_rm_voconst Zvex_r_v_rmconst Zvex_rm_r_voconst Zvex_rm_v_rconst Zvex_rm_v_roconst Zvex_v_rm_rconst Zxxx = iotavar _yandnl = []ytab{...}var _ybextrl = []ytab{...}var _yblsil = []ytab{...}var _ykaddb = []ytab{...}var _ykmovb = []ytab{...}var _yknotb = []ytab{...}var _ykshiftlb = []ytab{...}var _yrorxl = []ytab{...}var _yv4fmaddps = []ytab{...}var _yv4fmaddss = []ytab{...}var _yvaddpd = []ytab{...}var _yvaddsd = []ytab{...}var _yvaddsubpd = []ytab{...}var _yvaesdec = []ytab{...}var _yvaesimc = []ytab{...}var _yvaeskeygenassist = []ytab{...}var _yvalignd = []ytab{...}var _yvandnpd = []ytab{...}var _yvblendmpd = []ytab{...}var _yvblendpd = []ytab{...}var _yvblendvpd = []ytab{...}var _yvbroadcastf128 = []ytab{...}var _yvbroadcastf32x2 = []ytab{...}var _yvbroadcastf32x4 = []ytab{...}var _yvbroadcastf32x8 = []ytab{...}var _yvbroadcasti32x2 = []ytab{...}var _yvbroadcastsd = []ytab{...}var _yvbroadcastss = []ytab{...}var _yvcmppd = []ytab{...}var _yvcmpsd = []ytab{...}var _yvcomisd = []ytab{...}var _yvcompresspd = []ytab{...}var _yvcvtdq2pd = []ytab{...}var _yvcvtdq2ps = []ytab{...}var _yvcvtpd2dq = []ytab{...}var _yvcvtpd2dqx = []ytab{...}var _yvcvtpd2dqy = []ytab{...}var _yvcvtpd2qq = []ytab{...}var _yvcvtpd2udqx = []ytab{...}var _yvcvtpd2udqy = []ytab{...}var _yvcvtph2ps = []ytab{...}var _yvcvtps2ph = []ytab{...}var _yvcvtps2qq = []ytab{...}var _yvcvtsd2si = []ytab{...}var _yvcvtsd2usil = []ytab{...}var _yvcvtsi2sdl = []ytab{...}var _yvcvtudq2pd = []ytab{...}var _yvcvtusi2sdl = []ytab{...}var _yvdppd = []ytab{...}var _yvexp2pd = []ytab{...}var _yvexpandpd = []ytab{...}var _yvextractf128 = []ytab{...}var _yvextractf32x4 = []ytab{...}var _yvextractf32x8 = []ytab{...}var _yvextractps = []ytab{...}var _yvfixupimmpd = []ytab{...}var _yvfixupimmsd = []ytab{...}var _yvfpclasspdx = []ytab{...}var _yvfpclasspdy = []ytab{...}var _yvfpclasspdz = []ytab{...}var _yvgatherdpd = []ytab{...}var _yvgatherdps = []ytab{...}var _yvgatherpf0dpd = []ytab{...}var _yvgatherpf0dps = []ytab{...}var _yvgatherqps = []ytab{...}var _yvgetexpsd = []ytab{...}var _yvgetmantpd = []ytab{...}var _yvgf2p8affineinvqb = []ytab{...}var _yvinsertf128 = []ytab{...}var _yvinsertf32x4 = []ytab{...}var _yvinsertf32x8 = []ytab{...}var _yvinsertps = []ytab{...}var _yvlddqu = []ytab{...}var _yvldmxcsr = []ytab{...}var _yvmaskmovdqu = []ytab{...}var _yvmaskmovpd = []ytab{...}var _yvmovapd = []ytab{...}var _yvmovd = []ytab{...}var _yvmovddup = []ytab{...}var _yvmovdqa = []ytab{...}var _yvmovdqa32 = []ytab{...}var _yvmovhlps = []ytab{...}var _yvmovhpd = []ytab{...}var _yvmovmskpd = []ytab{...}var _yvmovntdq = []ytab{...}var _yvmovntdqa = []ytab{...}var _yvmovq = []ytab{...}var _yvmovsd = []ytab{...}var _yvpbroadcastb = []ytab{...}var _yvpbroadcastmb2q = []ytab{...}var _yvpclmulqdq = []ytab{...}var _yvpcmpb = []ytab{...}var _yvpcmpeqb = []ytab{...}var _yvperm2f128 = []ytab{...}var _yvpermd = []ytab{...}var _yvpermilpd = []ytab{...}var _yvpermpd = []ytab{...}var _yvpermq = []ytab{...}var _yvpextrw = []ytab{...}var _yvpinsrb = []ytab{...}var _yvpmovb2m = []ytab{...}var _yvpmovdb = []ytab{...}var _yvpmovdw = []ytab{...}var _yvprold = []ytab{...}var _yvpscatterdd = []ytab{...}var _yvpscatterdq = []ytab{...}var _yvpscatterqd = []ytab{...}var _yvpshufbitqmb = []ytab{...}var _yvpshufd = []ytab{...}var _yvpslld = []ytab{...}var _yvpslldq = []ytab{...}var _yvpsraq = []ytab{...}var _yvptest = []ytab{...}var _yvrcpss = []ytab{...}var _yvroundpd = []ytab{...}var _yvscalefpd = []ytab{...}var _yvshuff32x4 = []ytab{...}var _yvzeroall = []ytab{...}argListMax specifies upper arg count limit expected to be carried by obj.Prog. Max len(obj.Prog.RestArgs) can be inferred from this to be 4.
const argListMax int = 6Using spare bit to make leading [E]VEX encoding byte different from 0x0f even if all other VEX fields are 0.
const avxEscape = *ast.BinaryExprvar avxOptab = [...]Optab{...}badOpSuffix is used to represent all invalid suffix combinations.
const badOpSuffix = *ast.CallExprvar bpduff1 = []byte{...}var bpduff2 = []byte{...}branchBackwards marks targets that are located behind. Used to express jumps to loop headers.
const branchBackwards = *ast.ParenExprbranchLoopHead marks loop entry. Used to insert padding for misaligned loops.
const branchLoopHeadbranchShort marks branches those target is close, with offset is in -128..127 range.
const branchShortEVEX is described by using 2-byte sequence. See evexBits for more details.
const evex0F = *ast.BinaryExprEVEX is described by using 2-byte sequence. See evexBits for more details.
const evex0F38 = *ast.BinaryExprEVEX is described by using 2-byte sequence. See evexBits for more details.
const evex0F3A = *ast.BinaryExprEVEX is described by using 2-byte sequence. See evexBits for more details.
const evex128 = *ast.BinaryExprEVEX is described by using 2-byte sequence. See evexBits for more details.
const evex256 = *ast.BinaryExprEVEX is described by using 2-byte sequence. See evexBits for more details.
const evex512 = *ast.BinaryExprEVEX is described by using 2-byte sequence. See evexBits for more details.
const evex66 = *ast.BinaryExprDisp8 for broadcasts.
const evexBcst = 0x18EVEX is described by using 2-byte sequence. See evexBits for more details.
const evexBcstN4 = *ast.BinaryExprEVEX is described by using 2-byte sequence. See evexBits for more details.
const evexBcstN8 = *ast.BinaryExprEVEX is described by using 2-byte sequence. See evexBits for more details.
const evexF2 = *ast.BinaryExprEVEX is described by using 2-byte sequence. See evexBits for more details.
const evexF3 = *ast.BinaryExprEVEX is described by using 2-byte sequence. See evexBits for more details.
const evexL = 0x0CEVEX is described by using 2-byte sequence. See evexBits for more details.
const evexLIG = *ast.BinaryExprEVEX is described by using 2-byte sequence. See evexBits for more details.
const evexM = 0x30Precalculated Disp8 N value. N acts like a multiplier for 8bit displacement. Note that some N are not used, but their bits are reserved.
const evexN = 0xE0EVEX is described by using 2-byte sequence. See evexBits for more details.
const evexN1 = *ast.BinaryExprEVEX is described by using 2-byte sequence. See evexBits for more details.
const evexN128 = *ast.BinaryExprEVEX is described by using 2-byte sequence. See evexBits for more details.
const evexN16 = *ast.BinaryExprEVEX is described by using 2-byte sequence. See evexBits for more details.
const evexN2 = *ast.BinaryExprEVEX is described by using 2-byte sequence. See evexBits for more details.
const evexN32 = *ast.BinaryExprEVEX is described by using 2-byte sequence. See evexBits for more details.
const evexN4 = *ast.BinaryExprEVEX is described by using 2-byte sequence. See evexBits for more details.
const evexN64 = *ast.BinaryExprEVEX is described by using 2-byte sequence. See evexBits for more details.
const evexN8 = *ast.BinaryExprEVEX is described by using 2-byte sequence. See evexBits for more details.
const evexP = 0x03EVEX is described by using 2-byte sequence. See evexBits for more details.
const evexRounding = 0x2EVEX is described by using 2-byte sequence. See evexBits for more details.
const evexRoundingEnabled = *ast.BinaryExprEVEX is described by using 2-byte sequence. See evexBits for more details.
const evexSae = 0x1EVEX is described by using 2-byte sequence. See evexBits for more details.
const evexSaeEnabled = *ast.BinaryExprevexSuffixMap maps obj.X86suffix to its decoded version. Filled during init().
var evexSuffixMap [255]evexSuffixEVEX is described by using 2-byte sequence. See evexBits for more details.
const evexW = 0x80EVEX is described by using 2-byte sequence. See evexBits for more details.
const evexW0 = *ast.BinaryExprEVEX is described by using 2-byte sequence. See evexBits for more details.
const evexW1 = *ast.BinaryExprEVEX is described by using 2-byte sequence. See evexBits for more details.
const evexWIG = *ast.BinaryExprFlags that permit certain AVX512 features. It's semantically illegal to combine evexZeroing and evexSae.
const evexZeroing = 0x4EVEX is described by using 2-byte sequence. See evexBits for more details.
const evexZeroingEnabled = *ast.BinaryExprvar isAndroid = *ast.BinaryExprLoop alignment constants: want to align loop entry to loopAlign-byte boundary, and willing to insert at most maxLoopPad bytes of NOP to do so. We define a loop entry as the target of a backward jump. gcc uses maxLoopPad = 10 for its 'generic x86-64' config, and it aligns all jump targets, not just backward jump targets. As of 6/1/2012, the effect of setting maxLoopPad = 10 here is very slight but negative, so the alignment is disabled by setting MaxLoopPad = 0. The code is here for reference and for future experiments.
const loopAlign = 16Prog.mark
const markBit = *ast.BinaryExprLoop alignment constants: want to align loop entry to loopAlign-byte boundary, and willing to insert at most maxLoopPad bytes of NOP to do so. We define a loop entry as the target of a backward jump. gcc uses maxLoopPad = 10 for its 'generic x86-64' config, and it aligns all jump targets, not just backward jump targets. As of 6/1/2012, the effect of setting maxLoopPad = 10 here is very slight but negative, so the alignment is disabled by setting MaxLoopPad = 0. The code is here for reference and for future experiments.
const maxLoopPad = 0const movDoubleShiftconst movFullPtrconst movLit uint8 = iotaconst movMemRegconst movMemReg2opconst movRegMemconst movRegMem2opconst movTLSRegsingle-instruction no-ops of various lengths. constructed by hand and disassembled with gdb to verify. see http://www.agner.org/optimize/optimizing_assembly.pdf for discussion.
var nop = [][16]uint8{...}opSuffixTable is a complete list of possible opcode suffix combinations. It "maps" uint8 suffix bits to their string representation. With the exception of first and last elements, order is not important.
var opSuffixTable = [...]string{...}var opindex [*ast.BinaryExpr]*OptabYou are doasm, holding in your hand a *obj.Prog with p.As set to, say, ACRC32, and p.From and p.To as operands (obj.Addr). The linker scans optab to find the entry with the given p.As and then looks through the ytable for that instruction (the second field in the optab struct) for a line whose first two values match the Ytypes of the p.From and p.To operands. The function oclass computes the specific Ytype of an operand and then the set of more general Ytypes that it satisfies is implied by the ycover table, set up in instinit. For example, oclass distinguishes the constants 0 and 1 from the more general 8-bit constants, but instinit says ycover[Yi0*Ymax+Ys32] = 1 ycover[Yi1*Ymax+Ys32] = 1 ycover[Yi8*Ymax+Ys32] = 1 which means that Yi0, Yi1, and Yi8 all count as Ys32 (signed 32) if that's what an instruction can handle. In parallel with the scan through the ytable for the appropriate line, there is a z pointer that starts out pointing at the strange magic byte list in the Optab struct. With each step past a non-matching ytable line, z advances by the 4th entry in the line. When a matching line is found, that z pointer has the extra data to use in laying down the instruction bytes. The actual bytes laid down are a function of the 3rd entry in the line (that is, the Ztype) and the z bytes. For example, let's look at AADDL. The optab line says: {AADDL, yaddl, Px, opBytes{0x83, 00, 0x05, 0x81, 00, 0x01, 0x03}}, and yaddl says var yaddl = []ytab{ {Yi8, Ynone, Yml, Zibo_m, 2}, {Yi32, Ynone, Yax, Zil_, 1}, {Yi32, Ynone, Yml, Zilo_m, 2}, {Yrl, Ynone, Yml, Zr_m, 1}, {Yml, Ynone, Yrl, Zm_r, 1}, } so there are 5 possible types of ADDL instruction that can be laid down, and possible states used to lay them down (Ztype and z pointer, assuming z points at opBytes{0x83, 00, 0x05,0x81, 00, 0x01, 0x03}) are: Yi8, Yml -> Zibo_m, z (0x83, 00) Yi32, Yax -> Zil_, z+2 (0x05) Yi32, Yml -> Zilo_m, z+2+1 (0x81, 0x00) Yrl, Yml -> Zr_m, z+2+1+2 (0x01) Yml, Yrl -> Zm_r, z+2+1+2+1 (0x03) The Pconstant in the optab line controls the prefix bytes to emit. That's relatively straightforward as this program goes. The switch on yt.zcase in doasm implements the various Z cases. Zibo_m, for example, is an opcode byte (z[0]) then an asmando (which is some kind of encoded addressing mode for the Yml arg), and then a single immediate byte. Zilo_m is the same but a long (32-bit) immediate.
var optab = [...]Optab{...}var plan9privates *obj.LSymRounding control values. Match exact value for EVEX.L'L field (with exception of rcUnset).
const rcRDSAE = 1Rounding control values. Match exact value for EVEX.L'L field (with exception of rcUnset).
const rcRNSAE = 0Rounding control values. Match exact value for EVEX.L'L field (with exception of rcUnset).
const rcRUSAE = 2Rounding control values. Match exact value for EVEX.L'L field (with exception of rcUnset).
const rcRZSAE = 3Rounding control values. Match exact value for EVEX.L'L field (with exception of rcUnset).
const rcUnset = 4const readFrom rwMask = *ast.BinaryExprconst readFrom3const readRegconst readTovar reg [MAXREG]intvar regrex [*ast.BinaryExpr]intvar unaryDst = map[obj.As]bool{...}M field - 5 bits, but mostly reserved; we can store up to 3
const vex0F = *ast.BinaryExprconst vex0F38 = *ast.BinaryExprconst vex0F3A = *ast.BinaryExprconst vex128 = *ast.BinaryExprconst vex256 = *ast.BinaryExprP field - 2 bits
const vex66 = *ast.BinaryExprconst vexF2 = *ast.BinaryExprconst vexF3 = *ast.BinaryExprconst vexLIG = *ast.BinaryExprL field - 1 bit
const vexLZ = *ast.BinaryExprconst vexW0 = *ast.BinaryExprconst vexW1 = *ast.BinaryExprW field - 1 bit
const vexWIG = *ast.BinaryExprconst writeFromconst writeFrom3const writeRegconst writeTovar yaddl = []ytab{...}var yaes = []ytab{...}var yblendvpd = []ytab{...}var ybswap = []ytab{...}var ybtl = []ytab{...}var ybyte = []ytab{...}var ycall = []ytab{...}var yclflush = []ytab{...}var ycmpb = []ytab{...}var ycmpl = []ytab{...}var ycompp = []ytab{...}var ycover [*ast.BinaryExpr]uint8var ycrc32b = []ytab{...}var ycrc32l = []ytab{...}var ydivb = []ytab{...}var ydivl = []ytab{...}var yduff = []ytab{...}var yextr = []ytab{...}var yextractps = []ytab{...}var yextrw = []ytab{...}var yfadd = []ytab{...}var yfcmv = []ytab{...}var yfmvd = []ytab{...}var yfmvdp = []ytab{...}var yfmvf = []ytab{...}var yfmvp = []ytab{...}var yfmvx = []ytab{...}var yfuncdata = []ytab{...}var yfxch = []ytab{...}var yimul = []ytab{...}var yimul3 = []ytab{...}var yin = []ytab{...}var yincl = []ytab{...}var yincq = []ytab{...}var yinsr = []ytab{...}var yinsrw = []ytab{...}var yint = []ytab{...}var yjcond = []ytab{...}var yjmp = []ytab{...}var ylddqu = []ytab{...}var yloop = []ytab{...}var ym_rl = []ytab{...}var ymb_rl = []ytab{...}var yml_mb = []ytab{...}var yml_rl = []ytab{...}var ymm = []ytab{...}var ymmxmm0f38 = []ytab{...}var ymovb = []ytab{...}var ymovbe = []ytab{...}var ymovl = []ytab{...}var ymovq = []ytab{...}var ymovtab = []movtab{...}var ymovw = []ytab{...}var ymr = []ytab{...}var ymr_ml = []ytab{...}var ymrxr = []ytab{...}var ymshuf = []ytab{...}var ymshufb = []ytab{...}var ymskb = []ytab{...}var ynone = []ytab{...}var ynop = []ytab{...}var ypalignr = []ytab{...}var ypcdata = []ytab{...}var ypopl = []ytab{...}var yprefetch = []ytab{...}var yps = []ytab{...}var ypsdq = []ytab{...}var ypushl = []ytab{...}var yrb_mb = []ytab{...}var yrdrand = []ytab{...}var yret = []ytab{...}var yrl_m = []ytab{...}var yrl_ml = []ytab{...}var yscond = []ytab{...}var ysha1rnds4 = []ytab{...}var ysha256rnds2 = []ytab{...}var yshb = []ytab{...}var yshl = []ytab{...}var ystsw = []ytab{...}var ysvrs_mo = []ytab{...}unaryDst version of "ysvrs_mo".
var ysvrs_om = []ytab{...}var ytestl = []ytab{...}var ytext = []ytab{...}var ywrfsbase = []ytab{...}var yxabort = []ytab{...}var yxbegin = []ytab{...}var yxchg = []ytab{...}var yxcmpi = []ytab{...}var yxcvfl = []ytab{...}var yxcvfq = []ytab{...}var yxcvlf = []ytab{...}var yxcvm1 = []ytab{...}var yxcvm2 = []ytab{...}var yxcvqf = []ytab{...}var yxm = []ytab{...}var yxm_q4 = []ytab{...}var yxmov = []ytab{...}var yxorb = []ytab{...}var yxr = []ytab{...}var yxr_ml = []ytab{...}var yxrrl = []ytab{...}It should never have more than 1 entry, because some optab entries have opcode sequences that are longer than 2 bytes (zoffset=2 here), ROUNDPD and ROUNDPS and recently added BLENDPD, to name a few.
var yxshuf = []ytab{...}type argList [argListMax]uint8opBytes holds optab encoding bytes. Each ytab reserves fixed amount of bytes in this array. The size should be the minimal number of bytes that are enough to hold biggest optab op lines.
type opBytes [31]uint8opSuffix represents instruction opcode suffix. Compound (multi-part) suffixes expressed with single opSuffix value. uint8 type is used to fit obj.Prog.Scond.
type opSuffix uint8type padJumpsCtx int32type rwMask intAsmBuf is a simple buffer to assemble variable-length x86 instructions into and hold assembly state.
type AsmBuf struct {
buf [100]byte
off int
rexflag int
vexflag bool
evexflag bool
rep bool
repn bool
lock bool
evex evexBits
}type Optab struct {
as obj.As
ytab []ytab
prefix uint8
op opBytes
}evexBits stores EVEX prefix info that is used during instruction encoding.
type evexBits struct {
b1 byte
b2 byte
opcode byte
}evexSuffixBits carries instruction EVEX suffix set flags. Examples: "RU_SAE.Z" => {rounding: 3, zeroing: true} "Z" => {zeroing: true} "BCST" => {broadcast: true} "SAE.Z" => {sae: true, zeroing: true}
type evexSuffix struct {
rounding byte
sae bool
zeroing bool
broadcast bool
}type movtab struct {
as obj.As
ft uint8
f3t uint8
tt uint8
code uint8
op [4]uint8
}type nopPad struct {
p *obj.Prog
n int32
}type sehbuf struct {
ctxt *obj.Link
data []byte
off int
}type ytab struct {
zcase uint8
zoffset uint8
args argList
}At returns the byte at offset i.
func (ab *AsmBuf) At(i int) byteBroadcastEnabled reports whether BCST suffix is permitted.
func (evex evexBits) BroadcastEnabled() boolBytes returns the contents of the buffer.
func (ab *AsmBuf) Bytes() []bytefunc CanUse1InsnTLS(ctxt *obj.Link) boolDispMultiplier returns displacement multiplier that is calculated based on tuple type, EVEX.W and input size. If embedded broadcast is used, bcst should be true.
func (evex evexBits) DispMultiplier(bcst bool) int32EncodeRegisterRange packs [reg0-reg1] list into 64-bit value that is intended to be stored inside obj.Addr.Offset with TYPE_REGLIST.
func EncodeRegisterRange(reg0 int16, reg1 int16) int64Insert inserts b at offset i.
func (ab *AsmBuf) Insert(i int, b byte)IsValid reports whether suffix is valid. Empty suffixes are valid.
func (suffix opSuffix) IsValid() boolL returns EVEX.L'L value.
func (evex evexBits) L() byteLast returns the byte at the end of the buffer.
func (ab *AsmBuf) Last() byteLen returns the length of the buffer.
func (ab *AsmBuf) Len() intM returns EVEX.mm value.
func (evex evexBits) M() byteP returns EVEX.pp value.
func (evex evexBits) P() byteParseSuffix handles the special suffix for the 386/AMD64. Suffix bits are stored into p.Scond. Leading "." in cond is ignored.
func ParseSuffix(p *obj.Prog, cond string) errorPut copies b into the buffer.
func (ab *AsmBuf) Put(b []byte)Put1 appends one byte to the end of the buffer.
func (ab *AsmBuf) Put1(x byte)Put2 appends two bytes to the end of the buffer.
func (ab *AsmBuf) Put2(x byte, y byte)Put3 appends three bytes to the end of the buffer.
func (ab *AsmBuf) Put3(x byte, y byte, z byte)Put4 appends four bytes to the end of the buffer.
func (ab *AsmBuf) Put4(x byte, y byte, z byte, w byte)PutInt16 writes v into the buffer using little-endian encoding.
func (ab *AsmBuf) PutInt16(v int16)PutInt32 writes v into the buffer using little-endian encoding.
func (ab *AsmBuf) PutInt32(v int32)PutInt64 writes v into the buffer using little-endian encoding.
func (ab *AsmBuf) PutInt64(v int64)PutOpBytesLit writes zero terminated sequence of bytes from op, starting at specified offset (e.g. z counter value). Trailing 0 is not written. Intended to be used for literal Z cases. Literal Z cases usually have "Zlit" in their name (Zlit, Zlitr_m, Zlitm_r).
func (ab *AsmBuf) PutOpBytesLit(offset int, op *opBytes)Reset empties the buffer.
func (ab *AsmBuf) Reset()RoundingEnabled reports whether RN_SAE, RZ_SAE, RD_SAE and RU_SAE suffixes are permitted.
func (evex evexBits) RoundingEnabled() boolSaeEnabled reports whether SAE suffix is permitted.
func (evex evexBits) SaeEnabled() boolString returns suffix printed representation. It matches the string that was used to create suffix with NewX86Suffix() for valid suffixes. For all invalid suffixes, special marker is returned.
func (suffix opSuffix) String() stringW returns EVEX.W value.
func (evex evexBits) W() byteZeroingEnabled reports whether Z suffix is permitted.
func (evex evexBits) ZeroingEnabled() boolfunc addrMentionsR15(a *obj.Addr) boolfunc addrUsesGlobal(a *obj.Addr) boolfunc (ab *AsmBuf) asmand(ctxt *obj.Link, cursym *obj.LSym, p *obj.Prog, a *obj.Addr, ra *obj.Addr)func (ab *AsmBuf) asmando(ctxt *obj.Link, cursym *obj.LSym, p *obj.Prog, a *obj.Addr, o int)func (ab *AsmBuf) asmandsz(ctxt *obj.Link, cursym *obj.LSym, p *obj.Prog, a *obj.Addr, r int, rex int, m64 int)asmevex emits EVEX pregis and opcode byte. In addition to asmvex r/m, vvvv and reg fields also requires optional K-masking register. Expects asmbuf.evex to be properly initialized.
func (ab *AsmBuf) asmevex(ctxt *obj.Link, p *obj.Prog, rm *obj.Addr, v *obj.Addr, r *obj.Addr, k *obj.Addr)asmidx emits SIB byte.
func (ab *AsmBuf) asmidx(ctxt *obj.Link, scale int, index int, base int)func (ab *AsmBuf) asmins(ctxt *obj.Link, cursym *obj.LSym, p *obj.Prog)Emit VEX prefix and opcode byte. The three addresses are the r/m, vvvv, and reg fields. The reg and rm arguments appear in the same order as the arguments to asmand, which typically follows the call to asmvex. The final two arguments are the VEX prefix (see encoding above) and the opcode byte. For details about vex prefix see: https://en.wikipedia.org/wiki/VEX_prefix#Technical_description
func (ab *AsmBuf) asmvex(ctxt *obj.Link, rm *obj.Addr, v *obj.Addr, r *obj.Addr, vex uint8, opcode uint8)avx2gatherValid reports whether p satisfies AVX2 gather constraints. Reports errors via ctxt.
func avx2gatherValid(ctxt *obj.Link, p *obj.Prog) boolavx512gatherValid reports whether p satisfies AVX512 gather constraints. Reports errors via ctxt.
func avx512gatherValid(ctxt *obj.Link, p *obj.Prog) boolfunc bytereg(a *obj.Addr, t *uint8)byteswapreg returns a byte-addressable register (AX, BX, CX, DX) which is not referenced in a. If a is empty, it returns BX to account for MULB-like instructions that might use DX and AX.
func byteswapreg(ctxt *obj.Link, a *obj.Addr) intcompressedDisp8 calculates EVEX compressed displacement, if applicable.
func compressedDisp8(disp int32, elemSize int32) (disp8 byte, ok bool)decodeRegisterRange unpacks [reg0-reg1] list from 64-bit value created by EncodeRegisterRange.
func decodeRegisterRange(list int64) (reg0 int, reg1 int)func (ab *AsmBuf) doasm(ctxt *obj.Link, cursym *obj.LSym, p *obj.Prog)func errorCheck(ctxt *obj.Link, s *obj.LSym)evexZcase reports whether given Z-case belongs to EVEX group.
func evexZcase(zcase uint8) boolNative Client rejects the repeated 0x66 prefix. {0x66, 0x66, 0x0F, 0x1F, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00},
func fillnop(p []byte, n int)fusedJump determines whether p can be fused with a subsequent conditional jump instruction. If it can, we return true followed by the total size of the fused jump. If it can't, we return false. Macro fusion rules are derived from the Intel Optimization Manual (April 2019) section 3.4.2.2.
func fusedJump(p *obj.Prog) (bool, uint8)func indir_cx(ctxt *obj.Link, a *obj.Addr)inferSuffixError returns non-nil error that describes what could be the cause of suffix parse failure. At the point this function is executed there is already assembly error, so we can burn some clocks to construct good error message. Reported issues: - duplicated suffixes - illegal rounding/SAE+broadcast combinations - unknown suffixes - misplaced suffix (e.g. wrong Z suffix position)
func inferSuffixError(cond string) errorfunc init()func init()func instinit(ctxt *obj.Link)isJump returns whether p is a jump instruction. It is used to ensure that no standalone or macro-fused jump will straddle or end on a 32 byte boundary by inserting NOPs before the jumps.
func isJump(p *obj.Prog) boolfunc isR15(r int16) boolfunc isZeroArgRuntimeCall(s *obj.LSym) boolfunc isax(a *obj.Addr) boolfunc isbadbyte(a *obj.Addr) boolloadG ensures the G is loaded into a register (either CX or REGG), appending instructions to p if necessary. It returns the new last instruction and the G register.
func loadG(ctxt *obj.Link, cursym *obj.LSym, p *obj.Prog, newprog obj.ProgAlloc) (*obj.Prog, int16)lookForJCC returns the first real instruction starting from p, if that instruction is a conditional jump. Otherwise, nil is returned.
func lookForJCC(p *obj.Prog) *obj.Progfunc makePjcCtx(ctxt *obj.Link) padJumpsCtxReturns true if yt is compatible with args. Elements from args and yt.args are used to index ycover table like `ycover[args[i]+yt.args[i]]`. This means that args should contain values that already multiplied by Ymax.
func (yt *ytab) match(args []int) boolfunc (ab *AsmBuf) mediaop(ctxt *obj.Link, o *Optab, op int, osize int, z int) intnewEVEXBits creates evexBits object from enc bytes at z position.
func newEVEXBits(z int, enc *opBytes) evexBitsnewEVEXSuffix returns proper zero value for evexSuffix.
func newEVEXSuffix() evexSuffixnewOpSuffix returns opSuffix object that matches suffixes string. If no matching suffix is found, special "invalid" suffix is returned. Use IsValid method to check against this case.
func newOpSuffix(suffixes string) opSuffixfunc newsehbuf(ctxt *obj.Link, nodes uint8) sehbuffunc noppad(ctxt *obj.Link, s *obj.LSym, c int32, pad int32) int32func oclass(ctxt *obj.Link, p *obj.Prog, a *obj.Addr) intoclassRegList returns multisource operand class for addr.
func oclassRegList(ctxt *obj.Link, addr *obj.Addr) intoclassVMem returns V-mem (vector memory with VSIB) operand class. For addr that is not V-mem returns (Yxxx, false).
func oclassVMem(ctxt *obj.Link, addr *obj.Addr) (int, bool)func opSuffixString(s uint8) stringpadJump detects whether the instruction being assembled is a standalone or a macro-fused jump that needs to be padded. If it is, NOPs are inserted to ensure that the jump does not cross or end on a 32 byte boundary.
func (pjc padJumpsCtx) padJump(ctxt *obj.Link, s *obj.LSym, p *obj.Prog, c int32) int32populateSeh generates the SEH unwind information for s.
func populateSeh(ctxt *obj.Link, s *obj.LSym) (sehsym *obj.LSym)func prefixof(ctxt *obj.Link, a *obj.Addr) intfunc preprocess(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc)func progMentionsR15(p *obj.Prog) boolprogRW returns a mask describing the effects of the instruction p. Note: this isn't exhaustively accurate. It is only currently used for detecting reads/writes to R15, so SSE register behavior isn't fully correct, and other weird cases (e.g. writes to DX by CLD) also aren't captured.
func progRW(p *obj.Prog) rwMaskprogReadsR15 reports whether p reads the register R15.
func progReadsR15(p *obj.Prog) boolfunc progUsesGlobal(p *obj.Prog) boolprogWritesR15 reports whether p writes the register R15.
func progWritesR15(p *obj.Prog) boolfunc progedit(ctxt *obj.Link, p *obj.Prog, newprog obj.ProgAlloc)func rconv(r int) stringreAssemble is called if an instruction's size changes during assembly. If it does and the instruction is a standalone or a macro-fused jump we need to reassemble.
func (pjc padJumpsCtx) reAssemble(p *obj.Prog) boolregIndex returns register index that fits in 5 bits. R : 3 bit | legacy instructions | N/A [R/V]EX.R : 1 bit | REX / VEX extension bit | Rxr EVEX.R : 1 bit | EVEX extension bit | RxrEvex Examples: REG_Z30 => 30 REG_X15 => 15 REG_R9 => 9 REG_AX => 0
func regIndex(r int16) intfunc (ab *AsmBuf) relput4(ctxt *obj.Link, cursym *obj.LSym, p *obj.Prog, a *obj.Addr)requireAlignment ensures that the function alignment is at least as high as a, which should be a power of two and between 8 and 2048, inclusive. the boolean result indicates whether the alignment meets those constraints
func requireAlignment(a int64, ctxt *obj.Link, cursym *obj.LSym) boolfunc rewriteToPcrel(ctxt *obj.Link, p *obj.Prog, newprog obj.ProgAlloc)Rewrite p, if necessary, to access global data via the global offset table.
func rewriteToUseGot(ctxt *obj.Link, p *obj.Prog, newprog obj.ProgAlloc)func rlconv(bits int64) stringfunc spadjop(ctxt *obj.Link, l obj.As, q obj.As) obj.Asfunc span6(ctxt *obj.Link, s *obj.LSym, newprog obj.ProgAlloc)Append code to p to check for stack split. Appends to (does not overwrite) p. Assumes g is in rg. Returns last new instruction and G register.
func stacksplit(ctxt *obj.Link, cursym *obj.LSym, p *obj.Prog, newprog obj.ProgAlloc, framesize int32, textarg int32) (*obj.Prog, int16)func subreg(p *obj.Prog, from int, to int)toDisp8 tries to convert disp to proper 8-bit displacement value.
func toDisp8(disp int32, p *obj.Prog, asmbuf *AsmBuf) (disp8 byte, ok bool)func unbytereg(a *obj.Addr, t *uint8)unpackOps4 extracts 4 operands from p.
func unpackOps4(p *obj.Prog) (arg0 *obj.Addr, arg1 *obj.Addr, arg2 *obj.Addr, dst *obj.Addr)unpackOps5 extracts 5 operands from p.
func unpackOps5(p *obj.Prog) (arg0 *obj.Addr, arg1 *obj.Addr, arg2 *obj.Addr, arg3 *obj.Addr, dst *obj.Addr)useAbs reports whether s describes a symbol that must avoid pc-relative addressing. This happens on systems like Solaris that call .so functions instead of system calls. It does not seem to be necessary for any other systems. This is probably working around a Solaris-specific bug that should be fixed differently, but we don't know what that bug is. And this does fix it.
func useAbs(ctxt *obj.Link, s *obj.LSym) boolfunc vaddr(ctxt *obj.Link, p *obj.Prog, a *obj.Addr, r *obj.Reloc) int64func (b *sehbuf) write32(v uint32)func (b *sehbuf) write8(v uint8)func (b *sehbuf) writecode(op uint8, value uint8)Generated with Arrow