Imports #
"encoding/binary"
"fmt"
"bytes"
"fmt"
"strings"
"bytes"
"fmt"
"bytes"
"encoding/binary"
"fmt"
"io"
"math"
"strings"
"encoding/binary"
"fmt"
"bytes"
"fmt"
"strings"
"bytes"
"fmt"
"bytes"
"encoding/binary"
"fmt"
"io"
"math"
"strings"
const ADC
const ADC_CC
const ADC_CS
const ADC_EQ
const ADC_GE
const ADC_GT
const ADC_HI
const ADC_LE
const ADC_LS
const ADC_LT
const ADC_MI
const ADC_NE
const ADC_PL
const ADC_S
const ADC_S_CC
const ADC_S_CS
const ADC_S_EQ
const ADC_S_GE
const ADC_S_GT
const ADC_S_HI
const ADC_S_LE
const ADC_S_LS
const ADC_S_LT
const ADC_S_MI
const ADC_S_NE
const ADC_S_PL
const ADC_S_VC
const ADC_S_VS
const ADC_S_ZZ
const ADC_VC
const ADC_VS
const ADC_ZZ
const ADD
const ADD_CC
const ADD_CS
const ADD_EQ
const ADD_GE
const ADD_GT
const ADD_HI
const ADD_LE
const ADD_LS
const ADD_LT
const ADD_MI
const ADD_NE
const ADD_PL
const ADD_S
const ADD_S_CC
const ADD_S_CS
const ADD_S_EQ
const ADD_S_GE
const ADD_S_GT
const ADD_S_HI
const ADD_S_LE
const ADD_S_LS
const ADD_S_LT
const ADD_S_MI
const ADD_S_NE
const ADD_S_PL
const ADD_S_VC
const ADD_S_VS
const ADD_S_ZZ
const ADD_VC
const ADD_VS
const ADD_ZZ
const AND
const AND_CC
const AND_CS
const AND_EQ
const AND_GE
const AND_GT
const AND_HI
const AND_LE
const AND_LS
const AND_LT
const AND_MI
const AND_NE
const AND_PL
const AND_S
const AND_S_CC
const AND_S_CS
const AND_S_EQ
const AND_S_GE
const AND_S_GT
const AND_S_HI
const AND_S_LE
const AND_S_LS
const AND_S_LT
const AND_S_MI
const AND_S_NE
const AND_S_PL
const AND_S_VC
const AND_S_VS
const AND_S_ZZ
const AND_VC
const AND_VS
const AND_ZZ
const APSR
const APSR_nzcv
const ASR
const ASR_CC
const ASR_CS
const ASR_EQ
const ASR_GE
const ASR_GT
const ASR_HI
const ASR_LE
const ASR_LS
const ASR_LT
const ASR_MI
const ASR_NE
const ASR_PL
const ASR_S
const ASR_S_CC
const ASR_S_CS
const ASR_S_EQ
const ASR_S_GE
const ASR_S_GT
const ASR_S_HI
const ASR_S_LE
const ASR_S_LS
const ASR_S_LT
const ASR_S_MI
const ASR_S_NE
const ASR_S_PL
const ASR_S_VC
const ASR_S_VS
const ASR_S_ZZ
const ASR_VC
const ASR_VS
const ASR_ZZ
const AddrLDM
const AddrLDM_WB
const AddrOffset
const AddrPostIndex
const AddrPreIndex
const B
const BFC
const BFC_CC
const BFC_CS
const BFC_EQ
const BFC_GE
const BFC_GT
const BFC_HI
const BFC_LE
const BFC_LS
const BFC_LT
const BFC_MI
const BFC_NE
const BFC_PL
const BFC_VC
const BFC_VS
const BFC_ZZ
const BFI
const BFI_CC
const BFI_CS
const BFI_EQ
const BFI_GE
const BFI_GT
const BFI_HI
const BFI_LE
const BFI_LS
const BFI_LT
const BFI_MI
const BFI_NE
const BFI_PL
const BFI_VC
const BFI_VS
const BFI_ZZ
const BIC
const BIC_CC
const BIC_CS
const BIC_EQ
const BIC_GE
const BIC_GT
const BIC_HI
const BIC_LE
const BIC_LS
const BIC_LT
const BIC_MI
const BIC_NE
const BIC_PL
const BIC_S
const BIC_S_CC
const BIC_S_CS
const BIC_S_EQ
const BIC_S_GE
const BIC_S_GT
const BIC_S_HI
const BIC_S_LE
const BIC_S_LS
const BIC_S_LT
const BIC_S_MI
const BIC_S_NE
const BIC_S_PL
const BIC_S_VC
const BIC_S_VS
const BIC_S_ZZ
const BIC_VC
const BIC_VS
const BIC_ZZ
const BKPT
const BKPT_CC
const BKPT_CS
const BKPT_EQ
const BKPT_GE
const BKPT_GT
const BKPT_HI
const BKPT_LE
const BKPT_LS
const BKPT_LT
const BKPT_MI
const BKPT_NE
const BKPT_PL
const BKPT_VC
const BKPT_VS
const BKPT_ZZ
const BL
const BLX
const BLX_CC
const BLX_CS
const BLX_EQ
const BLX_GE
const BLX_GT
const BLX_HI
const BLX_LE
const BLX_LS
const BLX_LT
const BLX_MI
const BLX_NE
const BLX_PL
const BLX_VC
const BLX_VS
const BLX_ZZ
const BL_CC
const BL_CS
const BL_EQ
const BL_GE
const BL_GT
const BL_HI
const BL_LE
const BL_LS
const BL_LT
const BL_MI
const BL_NE
const BL_PL
const BL_VC
const BL_VS
const BL_ZZ
const BX
const BXJ
const BXJ_CC
const BXJ_CS
const BXJ_EQ
const BXJ_GE
const BXJ_GT
const BXJ_HI
const BXJ_LE
const BXJ_LS
const BXJ_LT
const BXJ_MI
const BXJ_NE
const BXJ_PL
const BXJ_VC
const BXJ_VS
const BXJ_ZZ
const BX_CC
const BX_CS
const BX_EQ
const BX_GE
const BX_GT
const BX_HI
const BX_LE
const BX_LS
const BX_LT
const BX_MI
const BX_NE
const BX_PL
const BX_VC
const BX_VS
const BX_ZZ
const B_CC
const B_CS
const B_EQ
const B_GE
const B_GT
const B_HI
const B_LE
const B_LS
const B_LT
const B_MI
const B_NE
const B_PL
const B_VC
const B_VS
const B_ZZ
const BigEndian Endian = 1
const CLREX
const CLZ
const CLZ_CC
const CLZ_CS
const CLZ_EQ
const CLZ_GE
const CLZ_GT
const CLZ_HI
const CLZ_LE
const CLZ_LS
const CLZ_LT
const CLZ_MI
const CLZ_NE
const CLZ_PL
const CLZ_VC
const CLZ_VS
const CLZ_ZZ
const CMN
const CMN_CC
const CMN_CS
const CMN_EQ
const CMN_GE
const CMN_GT
const CMN_HI
const CMN_LE
const CMN_LS
const CMN_LT
const CMN_MI
const CMN_NE
const CMN_PL
const CMN_VC
const CMN_VS
const CMN_ZZ
const CMP
const CMP_CC
const CMP_CS
const CMP_EQ
const CMP_GE
const CMP_GT
const CMP_HI
const CMP_LE
const CMP_LS
const CMP_LT
const CMP_MI
const CMP_NE
const CMP_PL
const CMP_VC
const CMP_VS
const CMP_ZZ
const D0
const D1
const D10
const D11
const D12
const D13
const D14
const D15
const D16
const D17
const D18
const D19
const D2
const D20
const D21
const D22
const D23
const D24
const D25
const D26
const D27
const D28
const D29
const D3
const D30
const D31
const D4
const D5
const D6
const D7
const D8
const D9
const DBG
const DBG_CC
const DBG_CS
const DBG_EQ
const DBG_GE
const DBG_GT
const DBG_HI
const DBG_LE
const DBG_LS
const DBG_LT
const DBG_MI
const DBG_NE
const DBG_PL
const DBG_VC
const DBG_VS
const DBG_ZZ
const DMB
const DSB
const EOR
const EOR_CC
const EOR_CS
const EOR_EQ
const EOR_GE
const EOR_GT
const EOR_HI
const EOR_LE
const EOR_LS
const EOR_LT
const EOR_MI
const EOR_NE
const EOR_PL
const EOR_S
const EOR_S_CC
const EOR_S_CS
const EOR_S_EQ
const EOR_S_GE
const EOR_S_GT
const EOR_S_HI
const EOR_S_LE
const EOR_S_LS
const EOR_S_LT
const EOR_S_MI
const EOR_S_NE
const EOR_S_PL
const EOR_S_VC
const EOR_S_VS
const EOR_S_ZZ
const EOR_VC
const EOR_VS
const EOR_ZZ
const FPSCR
const ISB
const LDM
const LDMDA
const LDMDA_CC
const LDMDA_CS
const LDMDA_EQ
const LDMDA_GE
const LDMDA_GT
const LDMDA_HI
const LDMDA_LE
const LDMDA_LS
const LDMDA_LT
const LDMDA_MI
const LDMDA_NE
const LDMDA_PL
const LDMDA_VC
const LDMDA_VS
const LDMDA_ZZ
const LDMDB
const LDMDB_CC
const LDMDB_CS
const LDMDB_EQ
const LDMDB_GE
const LDMDB_GT
const LDMDB_HI
const LDMDB_LE
const LDMDB_LS
const LDMDB_LT
const LDMDB_MI
const LDMDB_NE
const LDMDB_PL
const LDMDB_VC
const LDMDB_VS
const LDMDB_ZZ
const LDMIB
const LDMIB_CC
const LDMIB_CS
const LDMIB_EQ
const LDMIB_GE
const LDMIB_GT
const LDMIB_HI
const LDMIB_LE
const LDMIB_LS
const LDMIB_LT
const LDMIB_MI
const LDMIB_NE
const LDMIB_PL
const LDMIB_VC
const LDMIB_VS
const LDMIB_ZZ
const LDM_CC
const LDM_CS
const LDM_EQ
const LDM_GE
const LDM_GT
const LDM_HI
const LDM_LE
const LDM_LS
const LDM_LT
const LDM_MI
const LDM_NE
const LDM_PL
const LDM_VC
const LDM_VS
const LDM_ZZ
const LDR
const LDRB
const LDRBT
const LDRBT_CC
const LDRBT_CS
const LDRBT_EQ
const LDRBT_GE
const LDRBT_GT
const LDRBT_HI
const LDRBT_LE
const LDRBT_LS
const LDRBT_LT
const LDRBT_MI
const LDRBT_NE
const LDRBT_PL
const LDRBT_VC
const LDRBT_VS
const LDRBT_ZZ
const LDRB_CC
const LDRB_CS
const LDRB_EQ
const LDRB_GE
const LDRB_GT
const LDRB_HI
const LDRB_LE
const LDRB_LS
const LDRB_LT
const LDRB_MI
const LDRB_NE
const LDRB_PL
const LDRB_VC
const LDRB_VS
const LDRB_ZZ
const LDRD
const LDRD_CC
const LDRD_CS
const LDRD_EQ
const LDRD_GE
const LDRD_GT
const LDRD_HI
const LDRD_LE
const LDRD_LS
const LDRD_LT
const LDRD_MI
const LDRD_NE
const LDRD_PL
const LDRD_VC
const LDRD_VS
const LDRD_ZZ
const LDREX
const LDREXB
const LDREXB_CC
const LDREXB_CS
const LDREXB_EQ
const LDREXB_GE
const LDREXB_GT
const LDREXB_HI
const LDREXB_LE
const LDREXB_LS
const LDREXB_LT
const LDREXB_MI
const LDREXB_NE
const LDREXB_PL
const LDREXB_VC
const LDREXB_VS
const LDREXB_ZZ
const LDREXD
const LDREXD_CC
const LDREXD_CS
const LDREXD_EQ
const LDREXD_GE
const LDREXD_GT
const LDREXD_HI
const LDREXD_LE
const LDREXD_LS
const LDREXD_LT
const LDREXD_MI
const LDREXD_NE
const LDREXD_PL
const LDREXD_VC
const LDREXD_VS
const LDREXD_ZZ
const LDREXH
const LDREXH_CC
const LDREXH_CS
const LDREXH_EQ
const LDREXH_GE
const LDREXH_GT
const LDREXH_HI
const LDREXH_LE
const LDREXH_LS
const LDREXH_LT
const LDREXH_MI
const LDREXH_NE
const LDREXH_PL
const LDREXH_VC
const LDREXH_VS
const LDREXH_ZZ
const LDREX_CC
const LDREX_CS
const LDREX_EQ
const LDREX_GE
const LDREX_GT
const LDREX_HI
const LDREX_LE
const LDREX_LS
const LDREX_LT
const LDREX_MI
const LDREX_NE
const LDREX_PL
const LDREX_VC
const LDREX_VS
const LDREX_ZZ
const LDRH
const LDRHT
const LDRHT_CC
const LDRHT_CS
const LDRHT_EQ
const LDRHT_GE
const LDRHT_GT
const LDRHT_HI
const LDRHT_LE
const LDRHT_LS
const LDRHT_LT
const LDRHT_MI
const LDRHT_NE
const LDRHT_PL
const LDRHT_VC
const LDRHT_VS
const LDRHT_ZZ
const LDRH_CC
const LDRH_CS
const LDRH_EQ
const LDRH_GE
const LDRH_GT
const LDRH_HI
const LDRH_LE
const LDRH_LS
const LDRH_LT
const LDRH_MI
const LDRH_NE
const LDRH_PL
const LDRH_VC
const LDRH_VS
const LDRH_ZZ
const LDRSB
const LDRSBT
const LDRSBT_CC
const LDRSBT_CS
const LDRSBT_EQ
const LDRSBT_GE
const LDRSBT_GT
const LDRSBT_HI
const LDRSBT_LE
const LDRSBT_LS
const LDRSBT_LT
const LDRSBT_MI
const LDRSBT_NE
const LDRSBT_PL
const LDRSBT_VC
const LDRSBT_VS
const LDRSBT_ZZ
const LDRSB_CC
const LDRSB_CS
const LDRSB_EQ
const LDRSB_GE
const LDRSB_GT
const LDRSB_HI
const LDRSB_LE
const LDRSB_LS
const LDRSB_LT
const LDRSB_MI
const LDRSB_NE
const LDRSB_PL
const LDRSB_VC
const LDRSB_VS
const LDRSB_ZZ
const LDRSH
const LDRSHT
const LDRSHT_CC
const LDRSHT_CS
const LDRSHT_EQ
const LDRSHT_GE
const LDRSHT_GT
const LDRSHT_HI
const LDRSHT_LE
const LDRSHT_LS
const LDRSHT_LT
const LDRSHT_MI
const LDRSHT_NE
const LDRSHT_PL
const LDRSHT_VC
const LDRSHT_VS
const LDRSHT_ZZ
const LDRSH_CC
const LDRSH_CS
const LDRSH_EQ
const LDRSH_GE
const LDRSH_GT
const LDRSH_HI
const LDRSH_LE
const LDRSH_LS
const LDRSH_LT
const LDRSH_MI
const LDRSH_NE
const LDRSH_PL
const LDRSH_VC
const LDRSH_VS
const LDRSH_ZZ
const LDRT
const LDRT_CC
const LDRT_CS
const LDRT_EQ
const LDRT_GE
const LDRT_GT
const LDRT_HI
const LDRT_LE
const LDRT_LS
const LDRT_LT
const LDRT_MI
const LDRT_NE
const LDRT_PL
const LDRT_VC
const LDRT_VS
const LDRT_ZZ
const LDR_CC
const LDR_CS
const LDR_EQ
const LDR_GE
const LDR_GT
const LDR_HI
const LDR_LE
const LDR_LS
const LDR_LT
const LDR_MI
const LDR_NE
const LDR_PL
const LDR_VC
const LDR_VS
const LDR_ZZ
const LR = R14
const LSL
const LSL_CC
const LSL_CS
const LSL_EQ
const LSL_GE
const LSL_GT
const LSL_HI
const LSL_LE
const LSL_LS
const LSL_LT
const LSL_MI
const LSL_NE
const LSL_PL
const LSL_S
const LSL_S_CC
const LSL_S_CS
const LSL_S_EQ
const LSL_S_GE
const LSL_S_GT
const LSL_S_HI
const LSL_S_LE
const LSL_S_LS
const LSL_S_LT
const LSL_S_MI
const LSL_S_NE
const LSL_S_PL
const LSL_S_VC
const LSL_S_VS
const LSL_S_ZZ
const LSL_VC
const LSL_VS
const LSL_ZZ
const LSR
const LSR_CC
const LSR_CS
const LSR_EQ
const LSR_GE
const LSR_GT
const LSR_HI
const LSR_LE
const LSR_LS
const LSR_LT
const LSR_MI
const LSR_NE
const LSR_PL
const LSR_S
const LSR_S_CC
const LSR_S_CS
const LSR_S_EQ
const LSR_S_GE
const LSR_S_GT
const LSR_S_HI
const LSR_S_LE
const LSR_S_LS
const LSR_S_LT
const LSR_S_MI
const LSR_S_NE
const LSR_S_PL
const LSR_S_VC
const LSR_S_VS
const LSR_S_ZZ
const LSR_VC
const LSR_VS
const LSR_ZZ
const LittleEndian Endian = 0
const MLA
const MLA_CC
const MLA_CS
const MLA_EQ
const MLA_GE
const MLA_GT
const MLA_HI
const MLA_LE
const MLA_LS
const MLA_LT
const MLA_MI
const MLA_NE
const MLA_PL
const MLA_S
const MLA_S_CC
const MLA_S_CS
const MLA_S_EQ
const MLA_S_GE
const MLA_S_GT
const MLA_S_HI
const MLA_S_LE
const MLA_S_LS
const MLA_S_LT
const MLA_S_MI
const MLA_S_NE
const MLA_S_PL
const MLA_S_VC
const MLA_S_VS
const MLA_S_ZZ
const MLA_VC
const MLA_VS
const MLA_ZZ
const MLS
const MLS_CC
const MLS_CS
const MLS_EQ
const MLS_GE
const MLS_GT
const MLS_HI
const MLS_LE
const MLS_LS
const MLS_LT
const MLS_MI
const MLS_NE
const MLS_PL
const MLS_VC
const MLS_VS
const MLS_ZZ
const MOV
const MOVT
const MOVT_CC
const MOVT_CS
const MOVT_EQ
const MOVT_GE
const MOVT_GT
const MOVT_HI
const MOVT_LE
const MOVT_LS
const MOVT_LT
const MOVT_MI
const MOVT_NE
const MOVT_PL
const MOVT_VC
const MOVT_VS
const MOVT_ZZ
const MOVW
const MOVW_CC
const MOVW_CS
const MOVW_EQ
const MOVW_GE
const MOVW_GT
const MOVW_HI
const MOVW_LE
const MOVW_LS
const MOVW_LT
const MOVW_MI
const MOVW_NE
const MOVW_PL
const MOVW_VC
const MOVW_VS
const MOVW_ZZ
const MOV_CC
const MOV_CS
const MOV_EQ
const MOV_GE
const MOV_GT
const MOV_HI
const MOV_LE
const MOV_LS
const MOV_LT
const MOV_MI
const MOV_NE
const MOV_PL
const MOV_S
const MOV_S_CC
const MOV_S_CS
const MOV_S_EQ
const MOV_S_GE
const MOV_S_GT
const MOV_S_HI
const MOV_S_LE
const MOV_S_LS
const MOV_S_LT
const MOV_S_MI
const MOV_S_NE
const MOV_S_PL
const MOV_S_VC
const MOV_S_VS
const MOV_S_ZZ
const MOV_VC
const MOV_VS
const MOV_ZZ
const MRS
const MRS_CC
const MRS_CS
const MRS_EQ
const MRS_GE
const MRS_GT
const MRS_HI
const MRS_LE
const MRS_LS
const MRS_LT
const MRS_MI
const MRS_NE
const MRS_PL
const MRS_VC
const MRS_VS
const MRS_ZZ
const MSR
const MSR_CC
const MSR_CS
const MSR_EQ
const MSR_GE
const MSR_GT
const MSR_HI
const MSR_LE
const MSR_LS
const MSR_LT
const MSR_MI
const MSR_NE
const MSR_PL
const MSR_VC
const MSR_VS
const MSR_ZZ
const MUL
const MUL_CC
const MUL_CS
const MUL_EQ
const MUL_GE
const MUL_GT
const MUL_HI
const MUL_LE
const MUL_LS
const MUL_LT
const MUL_MI
const MUL_NE
const MUL_PL
const MUL_S
const MUL_S_CC
const MUL_S_CS
const MUL_S_EQ
const MUL_S_GE
const MUL_S_GT
const MUL_S_HI
const MUL_S_LE
const MUL_S_LS
const MUL_S_LT
const MUL_S_MI
const MUL_S_NE
const MUL_S_PL
const MUL_S_VC
const MUL_S_VS
const MUL_S_ZZ
const MUL_VC
const MUL_VS
const MUL_ZZ
const MVN
const MVN_CC
const MVN_CS
const MVN_EQ
const MVN_GE
const MVN_GT
const MVN_HI
const MVN_LE
const MVN_LS
const MVN_LT
const MVN_MI
const MVN_NE
const MVN_PL
const MVN_S
const MVN_S_CC
const MVN_S_CS
const MVN_S_EQ
const MVN_S_GE
const MVN_S_GT
const MVN_S_HI
const MVN_S_LE
const MVN_S_LS
const MVN_S_LT
const MVN_S_MI
const MVN_S_NE
const MVN_S_PL
const MVN_S_VC
const MVN_S_VS
const MVN_S_ZZ
const MVN_VC
const MVN_VS
const MVN_ZZ
const ModeARM
const ModeThumb
const NOP
const NOP_CC
const NOP_CS
const NOP_EQ
const NOP_GE
const NOP_GT
const NOP_HI
const NOP_LE
const NOP_LS
const NOP_LT
const NOP_MI
const NOP_NE
const NOP_PL
const NOP_VC
const NOP_VS
const NOP_ZZ
const ORR
const ORR_CC
const ORR_CS
const ORR_EQ
const ORR_GE
const ORR_GT
const ORR_HI
const ORR_LE
const ORR_LS
const ORR_LT
const ORR_MI
const ORR_NE
const ORR_PL
const ORR_S
const ORR_S_CC
const ORR_S_CS
const ORR_S_EQ
const ORR_S_GE
const ORR_S_GT
const ORR_S_HI
const ORR_S_LE
const ORR_S_LS
const ORR_S_LT
const ORR_S_MI
const ORR_S_NE
const ORR_S_PL
const ORR_S_VC
const ORR_S_VS
const ORR_S_ZZ
const ORR_VC
const ORR_VS
const ORR_ZZ
const PC = R15
const PKHBT
const PKHBT_CC
const PKHBT_CS
const PKHBT_EQ
const PKHBT_GE
const PKHBT_GT
const PKHBT_HI
const PKHBT_LE
const PKHBT_LS
const PKHBT_LT
const PKHBT_MI
const PKHBT_NE
const PKHBT_PL
const PKHBT_VC
const PKHBT_VS
const PKHBT_ZZ
const PKHTB
const PKHTB_CC
const PKHTB_CS
const PKHTB_EQ
const PKHTB_GE
const PKHTB_GT
const PKHTB_HI
const PKHTB_LE
const PKHTB_LS
const PKHTB_LT
const PKHTB_MI
const PKHTB_NE
const PKHTB_PL
const PKHTB_VC
const PKHTB_VS
const PKHTB_ZZ
const PLD
const PLD_W
const PLI
const POP
const POP_CC
const POP_CS
const POP_EQ
const POP_GE
const POP_GT
const POP_HI
const POP_LE
const POP_LS
const POP_LT
const POP_MI
const POP_NE
const POP_PL
const POP_VC
const POP_VS
const POP_ZZ
const PUSH
const PUSH_CC
const PUSH_CS
const PUSH_EQ
const PUSH_GE
const PUSH_GT
const PUSH_HI
const PUSH_LE
const PUSH_LS
const PUSH_LT
const PUSH_MI
const PUSH_NE
const PUSH_PL
const PUSH_VC
const PUSH_VS
const PUSH_ZZ
const QADD
const QADD16
const QADD16_CC
const QADD16_CS
const QADD16_EQ
const QADD16_GE
const QADD16_GT
const QADD16_HI
const QADD16_LE
const QADD16_LS
const QADD16_LT
const QADD16_MI
const QADD16_NE
const QADD16_PL
const QADD16_VC
const QADD16_VS
const QADD16_ZZ
const QADD8
const QADD8_CC
const QADD8_CS
const QADD8_EQ
const QADD8_GE
const QADD8_GT
const QADD8_HI
const QADD8_LE
const QADD8_LS
const QADD8_LT
const QADD8_MI
const QADD8_NE
const QADD8_PL
const QADD8_VC
const QADD8_VS
const QADD8_ZZ
const QADD_CC
const QADD_CS
const QADD_EQ
const QADD_GE
const QADD_GT
const QADD_HI
const QADD_LE
const QADD_LS
const QADD_LT
const QADD_MI
const QADD_NE
const QADD_PL
const QADD_VC
const QADD_VS
const QADD_ZZ
const QASX
const QASX_CC
const QASX_CS
const QASX_EQ
const QASX_GE
const QASX_GT
const QASX_HI
const QASX_LE
const QASX_LS
const QASX_LT
const QASX_MI
const QASX_NE
const QASX_PL
const QASX_VC
const QASX_VS
const QASX_ZZ
const QDADD
const QDADD_CC
const QDADD_CS
const QDADD_EQ
const QDADD_GE
const QDADD_GT
const QDADD_HI
const QDADD_LE
const QDADD_LS
const QDADD_LT
const QDADD_MI
const QDADD_NE
const QDADD_PL
const QDADD_VC
const QDADD_VS
const QDADD_ZZ
const QDSUB
const QDSUB_CC
const QDSUB_CS
const QDSUB_EQ
const QDSUB_GE
const QDSUB_GT
const QDSUB_HI
const QDSUB_LE
const QDSUB_LS
const QDSUB_LT
const QDSUB_MI
const QDSUB_NE
const QDSUB_PL
const QDSUB_VC
const QDSUB_VS
const QDSUB_ZZ
const QSAX
const QSAX_CC
const QSAX_CS
const QSAX_EQ
const QSAX_GE
const QSAX_GT
const QSAX_HI
const QSAX_LE
const QSAX_LS
const QSAX_LT
const QSAX_MI
const QSAX_NE
const QSAX_PL
const QSAX_VC
const QSAX_VS
const QSAX_ZZ
const QSUB
const QSUB16
const QSUB16_CC
const QSUB16_CS
const QSUB16_EQ
const QSUB16_GE
const QSUB16_GT
const QSUB16_HI
const QSUB16_LE
const QSUB16_LS
const QSUB16_LT
const QSUB16_MI
const QSUB16_NE
const QSUB16_PL
const QSUB16_VC
const QSUB16_VS
const QSUB16_ZZ
const QSUB8
const QSUB8_CC
const QSUB8_CS
const QSUB8_EQ
const QSUB8_GE
const QSUB8_GT
const QSUB8_HI
const QSUB8_LE
const QSUB8_LS
const QSUB8_LT
const QSUB8_MI
const QSUB8_NE
const QSUB8_PL
const QSUB8_VC
const QSUB8_VS
const QSUB8_ZZ
const QSUB_CC
const QSUB_CS
const QSUB_EQ
const QSUB_GE
const QSUB_GT
const QSUB_HI
const QSUB_LE
const QSUB_LS
const QSUB_LT
const QSUB_MI
const QSUB_NE
const QSUB_PL
const QSUB_VC
const QSUB_VS
const QSUB_ZZ
const R0 Reg = iota
const R1
const R10
const R11
const R12
const R13
const R14
const R15
const R2
const R3
const R4
const R5
const R6
const R7
const R8
const R9
const RBIT
const RBIT_CC
const RBIT_CS
const RBIT_EQ
const RBIT_GE
const RBIT_GT
const RBIT_HI
const RBIT_LE
const RBIT_LS
const RBIT_LT
const RBIT_MI
const RBIT_NE
const RBIT_PL
const RBIT_VC
const RBIT_VS
const RBIT_ZZ
const REV
const REV16
const REV16_CC
const REV16_CS
const REV16_EQ
const REV16_GE
const REV16_GT
const REV16_HI
const REV16_LE
const REV16_LS
const REV16_LT
const REV16_MI
const REV16_NE
const REV16_PL
const REV16_VC
const REV16_VS
const REV16_ZZ
const REVSH
const REVSH_CC
const REVSH_CS
const REVSH_EQ
const REVSH_GE
const REVSH_GT
const REVSH_HI
const REVSH_LE
const REVSH_LS
const REVSH_LT
const REVSH_MI
const REVSH_NE
const REVSH_PL
const REVSH_VC
const REVSH_VS
const REVSH_ZZ
const REV_CC
const REV_CS
const REV_EQ
const REV_GE
const REV_GT
const REV_HI
const REV_LE
const REV_LS
const REV_LT
const REV_MI
const REV_NE
const REV_PL
const REV_VC
const REV_VS
const REV_ZZ
const ROR
const ROR_CC
const ROR_CS
const ROR_EQ
const ROR_GE
const ROR_GT
const ROR_HI
const ROR_LE
const ROR_LS
const ROR_LT
const ROR_MI
const ROR_NE
const ROR_PL
const ROR_S
const ROR_S_CC
const ROR_S_CS
const ROR_S_EQ
const ROR_S_GE
const ROR_S_GT
const ROR_S_HI
const ROR_S_LE
const ROR_S_LS
const ROR_S_LT
const ROR_S_MI
const ROR_S_NE
const ROR_S_PL
const ROR_S_VC
const ROR_S_VS
const ROR_S_ZZ
const ROR_VC
const ROR_VS
const ROR_ZZ
const RRX
const RRX_CC
const RRX_CS
const RRX_EQ
const RRX_GE
const RRX_GT
const RRX_HI
const RRX_LE
const RRX_LS
const RRX_LT
const RRX_MI
const RRX_NE
const RRX_PL
const RRX_S
const RRX_S_CC
const RRX_S_CS
const RRX_S_EQ
const RRX_S_GE
const RRX_S_GT
const RRX_S_HI
const RRX_S_LE
const RRX_S_LS
const RRX_S_LT
const RRX_S_MI
const RRX_S_NE
const RRX_S_PL
const RRX_S_VC
const RRX_S_VS
const RRX_S_ZZ
const RRX_VC
const RRX_VS
const RRX_ZZ
const RSB
const RSB_CC
const RSB_CS
const RSB_EQ
const RSB_GE
const RSB_GT
const RSB_HI
const RSB_LE
const RSB_LS
const RSB_LT
const RSB_MI
const RSB_NE
const RSB_PL
const RSB_S
const RSB_S_CC
const RSB_S_CS
const RSB_S_EQ
const RSB_S_GE
const RSB_S_GT
const RSB_S_HI
const RSB_S_LE
const RSB_S_LS
const RSB_S_LT
const RSB_S_MI
const RSB_S_NE
const RSB_S_PL
const RSB_S_VC
const RSB_S_VS
const RSB_S_ZZ
const RSB_VC
const RSB_VS
const RSB_ZZ
const RSC
const RSC_CC
const RSC_CS
const RSC_EQ
const RSC_GE
const RSC_GT
const RSC_HI
const RSC_LE
const RSC_LS
const RSC_LT
const RSC_MI
const RSC_NE
const RSC_PL
const RSC_S
const RSC_S_CC
const RSC_S_CS
const RSC_S_EQ
const RSC_S_GE
const RSC_S_GT
const RSC_S_HI
const RSC_S_LE
const RSC_S_LS
const RSC_S_LT
const RSC_S_MI
const RSC_S_NE
const RSC_S_PL
const RSC_S_VC
const RSC_S_VS
const RSC_S_ZZ
const RSC_VC
const RSC_VS
const RSC_ZZ
const RotateRight Shift = 3
const RotateRightExt Shift = 4
const S0
const S1
const S10
const S11
const S12
const S13
const S14
const S15
const S16
const S17
const S18
const S19
const S2
const S20
const S21
const S22
const S23
const S24
const S25
const S26
const S27
const S28
const S29
const S3
const S30
const S31
const S4
const S5
const S6
const S7
const S8
const S9
const SADD16
const SADD16_CC
const SADD16_CS
const SADD16_EQ
const SADD16_GE
const SADD16_GT
const SADD16_HI
const SADD16_LE
const SADD16_LS
const SADD16_LT
const SADD16_MI
const SADD16_NE
const SADD16_PL
const SADD16_VC
const SADD16_VS
const SADD16_ZZ
const SADD8
const SADD8_CC
const SADD8_CS
const SADD8_EQ
const SADD8_GE
const SADD8_GT
const SADD8_HI
const SADD8_LE
const SADD8_LS
const SADD8_LT
const SADD8_MI
const SADD8_NE
const SADD8_PL
const SADD8_VC
const SADD8_VS
const SADD8_ZZ
const SASX
const SASX_CC
const SASX_CS
const SASX_EQ
const SASX_GE
const SASX_GT
const SASX_HI
const SASX_LE
const SASX_LS
const SASX_LT
const SASX_MI
const SASX_NE
const SASX_PL
const SASX_VC
const SASX_VS
const SASX_ZZ
const SBC
const SBC_CC
const SBC_CS
const SBC_EQ
const SBC_GE
const SBC_GT
const SBC_HI
const SBC_LE
const SBC_LS
const SBC_LT
const SBC_MI
const SBC_NE
const SBC_PL
const SBC_S
const SBC_S_CC
const SBC_S_CS
const SBC_S_EQ
const SBC_S_GE
const SBC_S_GT
const SBC_S_HI
const SBC_S_LE
const SBC_S_LS
const SBC_S_LT
const SBC_S_MI
const SBC_S_NE
const SBC_S_PL
const SBC_S_VC
const SBC_S_VS
const SBC_S_ZZ
const SBC_VC
const SBC_VS
const SBC_ZZ
const SBFX
const SBFX_CC
const SBFX_CS
const SBFX_EQ
const SBFX_GE
const SBFX_GT
const SBFX_HI
const SBFX_LE
const SBFX_LS
const SBFX_LT
const SBFX_MI
const SBFX_NE
const SBFX_PL
const SBFX_VC
const SBFX_VS
const SBFX_ZZ
const SDIV
const SDIV_CC
const SDIV_CS
const SDIV_EQ
const SDIV_GE
const SDIV_GT
const SDIV_HI
const SDIV_LE
const SDIV_LS
const SDIV_LT
const SDIV_MI
const SDIV_NE
const SDIV_PL
const SDIV_VC
const SDIV_VS
const SDIV_ZZ
const SEL
const SEL_CC
const SEL_CS
const SEL_EQ
const SEL_GE
const SEL_GT
const SEL_HI
const SEL_LE
const SEL_LS
const SEL_LT
const SEL_MI
const SEL_NE
const SEL_PL
const SEL_VC
const SEL_VS
const SEL_ZZ
const SETEND
const SEV
const SEV_CC
const SEV_CS
const SEV_EQ
const SEV_GE
const SEV_GT
const SEV_HI
const SEV_LE
const SEV_LS
const SEV_LT
const SEV_MI
const SEV_NE
const SEV_PL
const SEV_VC
const SEV_VS
const SEV_ZZ
const SHADD16
const SHADD16_CC
const SHADD16_CS
const SHADD16_EQ
const SHADD16_GE
const SHADD16_GT
const SHADD16_HI
const SHADD16_LE
const SHADD16_LS
const SHADD16_LT
const SHADD16_MI
const SHADD16_NE
const SHADD16_PL
const SHADD16_VC
const SHADD16_VS
const SHADD16_ZZ
const SHADD8
const SHADD8_CC
const SHADD8_CS
const SHADD8_EQ
const SHADD8_GE
const SHADD8_GT
const SHADD8_HI
const SHADD8_LE
const SHADD8_LS
const SHADD8_LT
const SHADD8_MI
const SHADD8_NE
const SHADD8_PL
const SHADD8_VC
const SHADD8_VS
const SHADD8_ZZ
const SHASX
const SHASX_CC
const SHASX_CS
const SHASX_EQ
const SHASX_GE
const SHASX_GT
const SHASX_HI
const SHASX_LE
const SHASX_LS
const SHASX_LT
const SHASX_MI
const SHASX_NE
const SHASX_PL
const SHASX_VC
const SHASX_VS
const SHASX_ZZ
const SHSAX
const SHSAX_CC
const SHSAX_CS
const SHSAX_EQ
const SHSAX_GE
const SHSAX_GT
const SHSAX_HI
const SHSAX_LE
const SHSAX_LS
const SHSAX_LT
const SHSAX_MI
const SHSAX_NE
const SHSAX_PL
const SHSAX_VC
const SHSAX_VS
const SHSAX_ZZ
const SHSUB16
const SHSUB16_CC
const SHSUB16_CS
const SHSUB16_EQ
const SHSUB16_GE
const SHSUB16_GT
const SHSUB16_HI
const SHSUB16_LE
const SHSUB16_LS
const SHSUB16_LT
const SHSUB16_MI
const SHSUB16_NE
const SHSUB16_PL
const SHSUB16_VC
const SHSUB16_VS
const SHSUB16_ZZ
const SHSUB8
const SHSUB8_CC
const SHSUB8_CS
const SHSUB8_EQ
const SHSUB8_GE
const SHSUB8_GT
const SHSUB8_HI
const SHSUB8_LE
const SHSUB8_LS
const SHSUB8_LT
const SHSUB8_MI
const SHSUB8_NE
const SHSUB8_PL
const SHSUB8_VC
const SHSUB8_VS
const SHSUB8_ZZ
const SMLABB
const SMLABB_CC
const SMLABB_CS
const SMLABB_EQ
const SMLABB_GE
const SMLABB_GT
const SMLABB_HI
const SMLABB_LE
const SMLABB_LS
const SMLABB_LT
const SMLABB_MI
const SMLABB_NE
const SMLABB_PL
const SMLABB_VC
const SMLABB_VS
const SMLABB_ZZ
const SMLABT
const SMLABT_CC
const SMLABT_CS
const SMLABT_EQ
const SMLABT_GE
const SMLABT_GT
const SMLABT_HI
const SMLABT_LE
const SMLABT_LS
const SMLABT_LT
const SMLABT_MI
const SMLABT_NE
const SMLABT_PL
const SMLABT_VC
const SMLABT_VS
const SMLABT_ZZ
const SMLAD
const SMLAD_CC
const SMLAD_CS
const SMLAD_EQ
const SMLAD_GE
const SMLAD_GT
const SMLAD_HI
const SMLAD_LE
const SMLAD_LS
const SMLAD_LT
const SMLAD_MI
const SMLAD_NE
const SMLAD_PL
const SMLAD_VC
const SMLAD_VS
const SMLAD_X
const SMLAD_X_CC
const SMLAD_X_CS
const SMLAD_X_EQ
const SMLAD_X_GE
const SMLAD_X_GT
const SMLAD_X_HI
const SMLAD_X_LE
const SMLAD_X_LS
const SMLAD_X_LT
const SMLAD_X_MI
const SMLAD_X_NE
const SMLAD_X_PL
const SMLAD_X_VC
const SMLAD_X_VS
const SMLAD_X_ZZ
const SMLAD_ZZ
const SMLAL
const SMLALBB
const SMLALBB_CC
const SMLALBB_CS
const SMLALBB_EQ
const SMLALBB_GE
const SMLALBB_GT
const SMLALBB_HI
const SMLALBB_LE
const SMLALBB_LS
const SMLALBB_LT
const SMLALBB_MI
const SMLALBB_NE
const SMLALBB_PL
const SMLALBB_VC
const SMLALBB_VS
const SMLALBB_ZZ
const SMLALBT
const SMLALBT_CC
const SMLALBT_CS
const SMLALBT_EQ
const SMLALBT_GE
const SMLALBT_GT
const SMLALBT_HI
const SMLALBT_LE
const SMLALBT_LS
const SMLALBT_LT
const SMLALBT_MI
const SMLALBT_NE
const SMLALBT_PL
const SMLALBT_VC
const SMLALBT_VS
const SMLALBT_ZZ
const SMLALD
const SMLALD_CC
const SMLALD_CS
const SMLALD_EQ
const SMLALD_GE
const SMLALD_GT
const SMLALD_HI
const SMLALD_LE
const SMLALD_LS
const SMLALD_LT
const SMLALD_MI
const SMLALD_NE
const SMLALD_PL
const SMLALD_VC
const SMLALD_VS
const SMLALD_X
const SMLALD_X_CC
const SMLALD_X_CS
const SMLALD_X_EQ
const SMLALD_X_GE
const SMLALD_X_GT
const SMLALD_X_HI
const SMLALD_X_LE
const SMLALD_X_LS
const SMLALD_X_LT
const SMLALD_X_MI
const SMLALD_X_NE
const SMLALD_X_PL
const SMLALD_X_VC
const SMLALD_X_VS
const SMLALD_X_ZZ
const SMLALD_ZZ
const SMLALTB
const SMLALTB_CC
const SMLALTB_CS
const SMLALTB_EQ
const SMLALTB_GE
const SMLALTB_GT
const SMLALTB_HI
const SMLALTB_LE
const SMLALTB_LS
const SMLALTB_LT
const SMLALTB_MI
const SMLALTB_NE
const SMLALTB_PL
const SMLALTB_VC
const SMLALTB_VS
const SMLALTB_ZZ
const SMLALTT
const SMLALTT_CC
const SMLALTT_CS
const SMLALTT_EQ
const SMLALTT_GE
const SMLALTT_GT
const SMLALTT_HI
const SMLALTT_LE
const SMLALTT_LS
const SMLALTT_LT
const SMLALTT_MI
const SMLALTT_NE
const SMLALTT_PL
const SMLALTT_VC
const SMLALTT_VS
const SMLALTT_ZZ
const SMLAL_CC
const SMLAL_CS
const SMLAL_EQ
const SMLAL_GE
const SMLAL_GT
const SMLAL_HI
const SMLAL_LE
const SMLAL_LS
const SMLAL_LT
const SMLAL_MI
const SMLAL_NE
const SMLAL_PL
const SMLAL_S
const SMLAL_S_CC
const SMLAL_S_CS
const SMLAL_S_EQ
const SMLAL_S_GE
const SMLAL_S_GT
const SMLAL_S_HI
const SMLAL_S_LE
const SMLAL_S_LS
const SMLAL_S_LT
const SMLAL_S_MI
const SMLAL_S_NE
const SMLAL_S_PL
const SMLAL_S_VC
const SMLAL_S_VS
const SMLAL_S_ZZ
const SMLAL_VC
const SMLAL_VS
const SMLAL_ZZ
const SMLATB
const SMLATB_CC
const SMLATB_CS
const SMLATB_EQ
const SMLATB_GE
const SMLATB_GT
const SMLATB_HI
const SMLATB_LE
const SMLATB_LS
const SMLATB_LT
const SMLATB_MI
const SMLATB_NE
const SMLATB_PL
const SMLATB_VC
const SMLATB_VS
const SMLATB_ZZ
const SMLATT
const SMLATT_CC
const SMLATT_CS
const SMLATT_EQ
const SMLATT_GE
const SMLATT_GT
const SMLATT_HI
const SMLATT_LE
const SMLATT_LS
const SMLATT_LT
const SMLATT_MI
const SMLATT_NE
const SMLATT_PL
const SMLATT_VC
const SMLATT_VS
const SMLATT_ZZ
const SMLAWB
const SMLAWB_CC
const SMLAWB_CS
const SMLAWB_EQ
const SMLAWB_GE
const SMLAWB_GT
const SMLAWB_HI
const SMLAWB_LE
const SMLAWB_LS
const SMLAWB_LT
const SMLAWB_MI
const SMLAWB_NE
const SMLAWB_PL
const SMLAWB_VC
const SMLAWB_VS
const SMLAWB_ZZ
const SMLAWT
const SMLAWT_CC
const SMLAWT_CS
const SMLAWT_EQ
const SMLAWT_GE
const SMLAWT_GT
const SMLAWT_HI
const SMLAWT_LE
const SMLAWT_LS
const SMLAWT_LT
const SMLAWT_MI
const SMLAWT_NE
const SMLAWT_PL
const SMLAWT_VC
const SMLAWT_VS
const SMLAWT_ZZ
const SMLSD
const SMLSD_CC
const SMLSD_CS
const SMLSD_EQ
const SMLSD_GE
const SMLSD_GT
const SMLSD_HI
const SMLSD_LE
const SMLSD_LS
const SMLSD_LT
const SMLSD_MI
const SMLSD_NE
const SMLSD_PL
const SMLSD_VC
const SMLSD_VS
const SMLSD_X
const SMLSD_X_CC
const SMLSD_X_CS
const SMLSD_X_EQ
const SMLSD_X_GE
const SMLSD_X_GT
const SMLSD_X_HI
const SMLSD_X_LE
const SMLSD_X_LS
const SMLSD_X_LT
const SMLSD_X_MI
const SMLSD_X_NE
const SMLSD_X_PL
const SMLSD_X_VC
const SMLSD_X_VS
const SMLSD_X_ZZ
const SMLSD_ZZ
const SMLSLD
const SMLSLD_CC
const SMLSLD_CS
const SMLSLD_EQ
const SMLSLD_GE
const SMLSLD_GT
const SMLSLD_HI
const SMLSLD_LE
const SMLSLD_LS
const SMLSLD_LT
const SMLSLD_MI
const SMLSLD_NE
const SMLSLD_PL
const SMLSLD_VC
const SMLSLD_VS
const SMLSLD_X
const SMLSLD_X_CC
const SMLSLD_X_CS
const SMLSLD_X_EQ
const SMLSLD_X_GE
const SMLSLD_X_GT
const SMLSLD_X_HI
const SMLSLD_X_LE
const SMLSLD_X_LS
const SMLSLD_X_LT
const SMLSLD_X_MI
const SMLSLD_X_NE
const SMLSLD_X_PL
const SMLSLD_X_VC
const SMLSLD_X_VS
const SMLSLD_X_ZZ
const SMLSLD_ZZ
const SMMLA
const SMMLA_CC
const SMMLA_CS
const SMMLA_EQ
const SMMLA_GE
const SMMLA_GT
const SMMLA_HI
const SMMLA_LE
const SMMLA_LS
const SMMLA_LT
const SMMLA_MI
const SMMLA_NE
const SMMLA_PL
const SMMLA_R
const SMMLA_R_CC
const SMMLA_R_CS
const SMMLA_R_EQ
const SMMLA_R_GE
const SMMLA_R_GT
const SMMLA_R_HI
const SMMLA_R_LE
const SMMLA_R_LS
const SMMLA_R_LT
const SMMLA_R_MI
const SMMLA_R_NE
const SMMLA_R_PL
const SMMLA_R_VC
const SMMLA_R_VS
const SMMLA_R_ZZ
const SMMLA_VC
const SMMLA_VS
const SMMLA_ZZ
const SMMLS
const SMMLS_CC
const SMMLS_CS
const SMMLS_EQ
const SMMLS_GE
const SMMLS_GT
const SMMLS_HI
const SMMLS_LE
const SMMLS_LS
const SMMLS_LT
const SMMLS_MI
const SMMLS_NE
const SMMLS_PL
const SMMLS_R
const SMMLS_R_CC
const SMMLS_R_CS
const SMMLS_R_EQ
const SMMLS_R_GE
const SMMLS_R_GT
const SMMLS_R_HI
const SMMLS_R_LE
const SMMLS_R_LS
const SMMLS_R_LT
const SMMLS_R_MI
const SMMLS_R_NE
const SMMLS_R_PL
const SMMLS_R_VC
const SMMLS_R_VS
const SMMLS_R_ZZ
const SMMLS_VC
const SMMLS_VS
const SMMLS_ZZ
const SMMUL
const SMMUL_CC
const SMMUL_CS
const SMMUL_EQ
const SMMUL_GE
const SMMUL_GT
const SMMUL_HI
const SMMUL_LE
const SMMUL_LS
const SMMUL_LT
const SMMUL_MI
const SMMUL_NE
const SMMUL_PL
const SMMUL_R
const SMMUL_R_CC
const SMMUL_R_CS
const SMMUL_R_EQ
const SMMUL_R_GE
const SMMUL_R_GT
const SMMUL_R_HI
const SMMUL_R_LE
const SMMUL_R_LS
const SMMUL_R_LT
const SMMUL_R_MI
const SMMUL_R_NE
const SMMUL_R_PL
const SMMUL_R_VC
const SMMUL_R_VS
const SMMUL_R_ZZ
const SMMUL_VC
const SMMUL_VS
const SMMUL_ZZ
const SMUAD
const SMUAD_CC
const SMUAD_CS
const SMUAD_EQ
const SMUAD_GE
const SMUAD_GT
const SMUAD_HI
const SMUAD_LE
const SMUAD_LS
const SMUAD_LT
const SMUAD_MI
const SMUAD_NE
const SMUAD_PL
const SMUAD_VC
const SMUAD_VS
const SMUAD_X
const SMUAD_X_CC
const SMUAD_X_CS
const SMUAD_X_EQ
const SMUAD_X_GE
const SMUAD_X_GT
const SMUAD_X_HI
const SMUAD_X_LE
const SMUAD_X_LS
const SMUAD_X_LT
const SMUAD_X_MI
const SMUAD_X_NE
const SMUAD_X_PL
const SMUAD_X_VC
const SMUAD_X_VS
const SMUAD_X_ZZ
const SMUAD_ZZ
const SMULBB
const SMULBB_CC
const SMULBB_CS
const SMULBB_EQ
const SMULBB_GE
const SMULBB_GT
const SMULBB_HI
const SMULBB_LE
const SMULBB_LS
const SMULBB_LT
const SMULBB_MI
const SMULBB_NE
const SMULBB_PL
const SMULBB_VC
const SMULBB_VS
const SMULBB_ZZ
const SMULBT
const SMULBT_CC
const SMULBT_CS
const SMULBT_EQ
const SMULBT_GE
const SMULBT_GT
const SMULBT_HI
const SMULBT_LE
const SMULBT_LS
const SMULBT_LT
const SMULBT_MI
const SMULBT_NE
const SMULBT_PL
const SMULBT_VC
const SMULBT_VS
const SMULBT_ZZ
const SMULL
const SMULL_CC
const SMULL_CS
const SMULL_EQ
const SMULL_GE
const SMULL_GT
const SMULL_HI
const SMULL_LE
const SMULL_LS
const SMULL_LT
const SMULL_MI
const SMULL_NE
const SMULL_PL
const SMULL_S
const SMULL_S_CC
const SMULL_S_CS
const SMULL_S_EQ
const SMULL_S_GE
const SMULL_S_GT
const SMULL_S_HI
const SMULL_S_LE
const SMULL_S_LS
const SMULL_S_LT
const SMULL_S_MI
const SMULL_S_NE
const SMULL_S_PL
const SMULL_S_VC
const SMULL_S_VS
const SMULL_S_ZZ
const SMULL_VC
const SMULL_VS
const SMULL_ZZ
const SMULTB
const SMULTB_CC
const SMULTB_CS
const SMULTB_EQ
const SMULTB_GE
const SMULTB_GT
const SMULTB_HI
const SMULTB_LE
const SMULTB_LS
const SMULTB_LT
const SMULTB_MI
const SMULTB_NE
const SMULTB_PL
const SMULTB_VC
const SMULTB_VS
const SMULTB_ZZ
const SMULTT
const SMULTT_CC
const SMULTT_CS
const SMULTT_EQ
const SMULTT_GE
const SMULTT_GT
const SMULTT_HI
const SMULTT_LE
const SMULTT_LS
const SMULTT_LT
const SMULTT_MI
const SMULTT_NE
const SMULTT_PL
const SMULTT_VC
const SMULTT_VS
const SMULTT_ZZ
const SMULWB
const SMULWB_CC
const SMULWB_CS
const SMULWB_EQ
const SMULWB_GE
const SMULWB_GT
const SMULWB_HI
const SMULWB_LE
const SMULWB_LS
const SMULWB_LT
const SMULWB_MI
const SMULWB_NE
const SMULWB_PL
const SMULWB_VC
const SMULWB_VS
const SMULWB_ZZ
const SMULWT
const SMULWT_CC
const SMULWT_CS
const SMULWT_EQ
const SMULWT_GE
const SMULWT_GT
const SMULWT_HI
const SMULWT_LE
const SMULWT_LS
const SMULWT_LT
const SMULWT_MI
const SMULWT_NE
const SMULWT_PL
const SMULWT_VC
const SMULWT_VS
const SMULWT_ZZ
const SMUSD
const SMUSD_CC
const SMUSD_CS
const SMUSD_EQ
const SMUSD_GE
const SMUSD_GT
const SMUSD_HI
const SMUSD_LE
const SMUSD_LS
const SMUSD_LT
const SMUSD_MI
const SMUSD_NE
const SMUSD_PL
const SMUSD_VC
const SMUSD_VS
const SMUSD_X
const SMUSD_X_CC
const SMUSD_X_CS
const SMUSD_X_EQ
const SMUSD_X_GE
const SMUSD_X_GT
const SMUSD_X_HI
const SMUSD_X_LE
const SMUSD_X_LS
const SMUSD_X_LT
const SMUSD_X_MI
const SMUSD_X_NE
const SMUSD_X_PL
const SMUSD_X_VC
const SMUSD_X_VS
const SMUSD_X_ZZ
const SMUSD_ZZ
const SP = R13
const SSAT
const SSAT16
const SSAT16_CC
const SSAT16_CS
const SSAT16_EQ
const SSAT16_GE
const SSAT16_GT
const SSAT16_HI
const SSAT16_LE
const SSAT16_LS
const SSAT16_LT
const SSAT16_MI
const SSAT16_NE
const SSAT16_PL
const SSAT16_VC
const SSAT16_VS
const SSAT16_ZZ
const SSAT_CC
const SSAT_CS
const SSAT_EQ
const SSAT_GE
const SSAT_GT
const SSAT_HI
const SSAT_LE
const SSAT_LS
const SSAT_LT
const SSAT_MI
const SSAT_NE
const SSAT_PL
const SSAT_VC
const SSAT_VS
const SSAT_ZZ
const SSAX
const SSAX_CC
const SSAX_CS
const SSAX_EQ
const SSAX_GE
const SSAX_GT
const SSAX_HI
const SSAX_LE
const SSAX_LS
const SSAX_LT
const SSAX_MI
const SSAX_NE
const SSAX_PL
const SSAX_VC
const SSAX_VS
const SSAX_ZZ
const SSUB16
const SSUB16_CC
const SSUB16_CS
const SSUB16_EQ
const SSUB16_GE
const SSUB16_GT
const SSUB16_HI
const SSUB16_LE
const SSUB16_LS
const SSUB16_LT
const SSUB16_MI
const SSUB16_NE
const SSUB16_PL
const SSUB16_VC
const SSUB16_VS
const SSUB16_ZZ
const SSUB8
const SSUB8_CC
const SSUB8_CS
const SSUB8_EQ
const SSUB8_GE
const SSUB8_GT
const SSUB8_HI
const SSUB8_LE
const SSUB8_LS
const SSUB8_LT
const SSUB8_MI
const SSUB8_NE
const SSUB8_PL
const SSUB8_VC
const SSUB8_VS
const SSUB8_ZZ
const STM
const STMDA
const STMDA_CC
const STMDA_CS
const STMDA_EQ
const STMDA_GE
const STMDA_GT
const STMDA_HI
const STMDA_LE
const STMDA_LS
const STMDA_LT
const STMDA_MI
const STMDA_NE
const STMDA_PL
const STMDA_VC
const STMDA_VS
const STMDA_ZZ
const STMDB
const STMDB_CC
const STMDB_CS
const STMDB_EQ
const STMDB_GE
const STMDB_GT
const STMDB_HI
const STMDB_LE
const STMDB_LS
const STMDB_LT
const STMDB_MI
const STMDB_NE
const STMDB_PL
const STMDB_VC
const STMDB_VS
const STMDB_ZZ
const STMIB
const STMIB_CC
const STMIB_CS
const STMIB_EQ
const STMIB_GE
const STMIB_GT
const STMIB_HI
const STMIB_LE
const STMIB_LS
const STMIB_LT
const STMIB_MI
const STMIB_NE
const STMIB_PL
const STMIB_VC
const STMIB_VS
const STMIB_ZZ
const STM_CC
const STM_CS
const STM_EQ
const STM_GE
const STM_GT
const STM_HI
const STM_LE
const STM_LS
const STM_LT
const STM_MI
const STM_NE
const STM_PL
const STM_VC
const STM_VS
const STM_ZZ
const STR
const STRB
const STRBT
const STRBT_CC
const STRBT_CS
const STRBT_EQ
const STRBT_GE
const STRBT_GT
const STRBT_HI
const STRBT_LE
const STRBT_LS
const STRBT_LT
const STRBT_MI
const STRBT_NE
const STRBT_PL
const STRBT_VC
const STRBT_VS
const STRBT_ZZ
const STRB_CC
const STRB_CS
const STRB_EQ
const STRB_GE
const STRB_GT
const STRB_HI
const STRB_LE
const STRB_LS
const STRB_LT
const STRB_MI
const STRB_NE
const STRB_PL
const STRB_VC
const STRB_VS
const STRB_ZZ
const STRD
const STRD_CC
const STRD_CS
const STRD_EQ
const STRD_GE
const STRD_GT
const STRD_HI
const STRD_LE
const STRD_LS
const STRD_LT
const STRD_MI
const STRD_NE
const STRD_PL
const STRD_VC
const STRD_VS
const STRD_ZZ
const STREX
const STREXB
const STREXB_CC
const STREXB_CS
const STREXB_EQ
const STREXB_GE
const STREXB_GT
const STREXB_HI
const STREXB_LE
const STREXB_LS
const STREXB_LT
const STREXB_MI
const STREXB_NE
const STREXB_PL
const STREXB_VC
const STREXB_VS
const STREXB_ZZ
const STREXD
const STREXD_CC
const STREXD_CS
const STREXD_EQ
const STREXD_GE
const STREXD_GT
const STREXD_HI
const STREXD_LE
const STREXD_LS
const STREXD_LT
const STREXD_MI
const STREXD_NE
const STREXD_PL
const STREXD_VC
const STREXD_VS
const STREXD_ZZ
const STREXH
const STREXH_CC
const STREXH_CS
const STREXH_EQ
const STREXH_GE
const STREXH_GT
const STREXH_HI
const STREXH_LE
const STREXH_LS
const STREXH_LT
const STREXH_MI
const STREXH_NE
const STREXH_PL
const STREXH_VC
const STREXH_VS
const STREXH_ZZ
const STREX_CC
const STREX_CS
const STREX_EQ
const STREX_GE
const STREX_GT
const STREX_HI
const STREX_LE
const STREX_LS
const STREX_LT
const STREX_MI
const STREX_NE
const STREX_PL
const STREX_VC
const STREX_VS
const STREX_ZZ
const STRH
const STRHT
const STRHT_CC
const STRHT_CS
const STRHT_EQ
const STRHT_GE
const STRHT_GT
const STRHT_HI
const STRHT_LE
const STRHT_LS
const STRHT_LT
const STRHT_MI
const STRHT_NE
const STRHT_PL
const STRHT_VC
const STRHT_VS
const STRHT_ZZ
const STRH_CC
const STRH_CS
const STRH_EQ
const STRH_GE
const STRH_GT
const STRH_HI
const STRH_LE
const STRH_LS
const STRH_LT
const STRH_MI
const STRH_NE
const STRH_PL
const STRH_VC
const STRH_VS
const STRH_ZZ
const STRT
const STRT_CC
const STRT_CS
const STRT_EQ
const STRT_GE
const STRT_GT
const STRT_HI
const STRT_LE
const STRT_LS
const STRT_LT
const STRT_MI
const STRT_NE
const STRT_PL
const STRT_VC
const STRT_VS
const STRT_ZZ
const STR_CC
const STR_CS
const STR_EQ
const STR_GE
const STR_GT
const STR_HI
const STR_LE
const STR_LS
const STR_LT
const STR_MI
const STR_NE
const STR_PL
const STR_VC
const STR_VS
const STR_ZZ
const SUB
const SUB_CC
const SUB_CS
const SUB_EQ
const SUB_GE
const SUB_GT
const SUB_HI
const SUB_LE
const SUB_LS
const SUB_LT
const SUB_MI
const SUB_NE
const SUB_PL
const SUB_S
const SUB_S_CC
const SUB_S_CS
const SUB_S_EQ
const SUB_S_GE
const SUB_S_GT
const SUB_S_HI
const SUB_S_LE
const SUB_S_LS
const SUB_S_LT
const SUB_S_MI
const SUB_S_NE
const SUB_S_PL
const SUB_S_VC
const SUB_S_VS
const SUB_S_ZZ
const SUB_VC
const SUB_VS
const SUB_ZZ
const SVC
const SVC_CC
const SVC_CS
const SVC_EQ
const SVC_GE
const SVC_GT
const SVC_HI
const SVC_LE
const SVC_LS
const SVC_LT
const SVC_MI
const SVC_NE
const SVC_PL
const SVC_VC
const SVC_VS
const SVC_ZZ
const SWP
const SWP_B
const SWP_B_CC
const SWP_B_CS
const SWP_B_EQ
const SWP_B_GE
const SWP_B_GT
const SWP_B_HI
const SWP_B_LE
const SWP_B_LS
const SWP_B_LT
const SWP_B_MI
const SWP_B_NE
const SWP_B_PL
const SWP_B_VC
const SWP_B_VS
const SWP_B_ZZ
const SWP_CC
const SWP_CS
const SWP_EQ
const SWP_GE
const SWP_GT
const SWP_HI
const SWP_LE
const SWP_LS
const SWP_LT
const SWP_MI
const SWP_NE
const SWP_PL
const SWP_VC
const SWP_VS
const SWP_ZZ
const SXTAB
const SXTAB16
const SXTAB16_CC
const SXTAB16_CS
const SXTAB16_EQ
const SXTAB16_GE
const SXTAB16_GT
const SXTAB16_HI
const SXTAB16_LE
const SXTAB16_LS
const SXTAB16_LT
const SXTAB16_MI
const SXTAB16_NE
const SXTAB16_PL
const SXTAB16_VC
const SXTAB16_VS
const SXTAB16_ZZ
const SXTAB_CC
const SXTAB_CS
const SXTAB_EQ
const SXTAB_GE
const SXTAB_GT
const SXTAB_HI
const SXTAB_LE
const SXTAB_LS
const SXTAB_LT
const SXTAB_MI
const SXTAB_NE
const SXTAB_PL
const SXTAB_VC
const SXTAB_VS
const SXTAB_ZZ
const SXTAH
const SXTAH_CC
const SXTAH_CS
const SXTAH_EQ
const SXTAH_GE
const SXTAH_GT
const SXTAH_HI
const SXTAH_LE
const SXTAH_LS
const SXTAH_LT
const SXTAH_MI
const SXTAH_NE
const SXTAH_PL
const SXTAH_VC
const SXTAH_VS
const SXTAH_ZZ
const SXTB
const SXTB16
const SXTB16_CC
const SXTB16_CS
const SXTB16_EQ
const SXTB16_GE
const SXTB16_GT
const SXTB16_HI
const SXTB16_LE
const SXTB16_LS
const SXTB16_LT
const SXTB16_MI
const SXTB16_NE
const SXTB16_PL
const SXTB16_VC
const SXTB16_VS
const SXTB16_ZZ
const SXTB_CC
const SXTB_CS
const SXTB_EQ
const SXTB_GE
const SXTB_GT
const SXTB_HI
const SXTB_LE
const SXTB_LS
const SXTB_LT
const SXTB_MI
const SXTB_NE
const SXTB_PL
const SXTB_VC
const SXTB_VS
const SXTB_ZZ
const SXTH
const SXTH_CC
const SXTH_CS
const SXTH_EQ
const SXTH_GE
const SXTH_GT
const SXTH_HI
const SXTH_LE
const SXTH_LS
const SXTH_LT
const SXTH_MI
const SXTH_NE
const SXTH_PL
const SXTH_VC
const SXTH_VS
const SXTH_ZZ
const ShiftLeft Shift = 0
const ShiftRight Shift = 1
const ShiftRightSigned Shift = 2
const TEQ
const TEQ_CC
const TEQ_CS
const TEQ_EQ
const TEQ_GE
const TEQ_GT
const TEQ_HI
const TEQ_LE
const TEQ_LS
const TEQ_LT
const TEQ_MI
const TEQ_NE
const TEQ_PL
const TEQ_VC
const TEQ_VS
const TEQ_ZZ
const TST
const TST_CC
const TST_CS
const TST_EQ
const TST_GE
const TST_GT
const TST_HI
const TST_LE
const TST_LS
const TST_LT
const TST_MI
const TST_NE
const TST_PL
const TST_VC
const TST_VS
const TST_ZZ
const UADD16
const UADD16_CC
const UADD16_CS
const UADD16_EQ
const UADD16_GE
const UADD16_GT
const UADD16_HI
const UADD16_LE
const UADD16_LS
const UADD16_LT
const UADD16_MI
const UADD16_NE
const UADD16_PL
const UADD16_VC
const UADD16_VS
const UADD16_ZZ
const UADD8
const UADD8_CC
const UADD8_CS
const UADD8_EQ
const UADD8_GE
const UADD8_GT
const UADD8_HI
const UADD8_LE
const UADD8_LS
const UADD8_LT
const UADD8_MI
const UADD8_NE
const UADD8_PL
const UADD8_VC
const UADD8_VS
const UADD8_ZZ
const UASX
const UASX_CC
const UASX_CS
const UASX_EQ
const UASX_GE
const UASX_GT
const UASX_HI
const UASX_LE
const UASX_LS
const UASX_LT
const UASX_MI
const UASX_NE
const UASX_PL
const UASX_VC
const UASX_VS
const UASX_ZZ
const UBFX
const UBFX_CC
const UBFX_CS
const UBFX_EQ
const UBFX_GE
const UBFX_GT
const UBFX_HI
const UBFX_LE
const UBFX_LS
const UBFX_LT
const UBFX_MI
const UBFX_NE
const UBFX_PL
const UBFX_VC
const UBFX_VS
const UBFX_ZZ
const UDIV
const UDIV_CC
const UDIV_CS
const UDIV_EQ
const UDIV_GE
const UDIV_GT
const UDIV_HI
const UDIV_LE
const UDIV_LS
const UDIV_LT
const UDIV_MI
const UDIV_NE
const UDIV_PL
const UDIV_VC
const UDIV_VS
const UDIV_ZZ
const UHADD16
const UHADD16_CC
const UHADD16_CS
const UHADD16_EQ
const UHADD16_GE
const UHADD16_GT
const UHADD16_HI
const UHADD16_LE
const UHADD16_LS
const UHADD16_LT
const UHADD16_MI
const UHADD16_NE
const UHADD16_PL
const UHADD16_VC
const UHADD16_VS
const UHADD16_ZZ
const UHADD8
const UHADD8_CC
const UHADD8_CS
const UHADD8_EQ
const UHADD8_GE
const UHADD8_GT
const UHADD8_HI
const UHADD8_LE
const UHADD8_LS
const UHADD8_LT
const UHADD8_MI
const UHADD8_NE
const UHADD8_PL
const UHADD8_VC
const UHADD8_VS
const UHADD8_ZZ
const UHASX
const UHASX_CC
const UHASX_CS
const UHASX_EQ
const UHASX_GE
const UHASX_GT
const UHASX_HI
const UHASX_LE
const UHASX_LS
const UHASX_LT
const UHASX_MI
const UHASX_NE
const UHASX_PL
const UHASX_VC
const UHASX_VS
const UHASX_ZZ
const UHSAX
const UHSAX_CC
const UHSAX_CS
const UHSAX_EQ
const UHSAX_GE
const UHSAX_GT
const UHSAX_HI
const UHSAX_LE
const UHSAX_LS
const UHSAX_LT
const UHSAX_MI
const UHSAX_NE
const UHSAX_PL
const UHSAX_VC
const UHSAX_VS
const UHSAX_ZZ
const UHSUB16
const UHSUB16_CC
const UHSUB16_CS
const UHSUB16_EQ
const UHSUB16_GE
const UHSUB16_GT
const UHSUB16_HI
const UHSUB16_LE
const UHSUB16_LS
const UHSUB16_LT
const UHSUB16_MI
const UHSUB16_NE
const UHSUB16_PL
const UHSUB16_VC
const UHSUB16_VS
const UHSUB16_ZZ
const UHSUB8
const UHSUB8_CC
const UHSUB8_CS
const UHSUB8_EQ
const UHSUB8_GE
const UHSUB8_GT
const UHSUB8_HI
const UHSUB8_LE
const UHSUB8_LS
const UHSUB8_LT
const UHSUB8_MI
const UHSUB8_NE
const UHSUB8_PL
const UHSUB8_VC
const UHSUB8_VS
const UHSUB8_ZZ
const UMAAL
const UMAAL_CC
const UMAAL_CS
const UMAAL_EQ
const UMAAL_GE
const UMAAL_GT
const UMAAL_HI
const UMAAL_LE
const UMAAL_LS
const UMAAL_LT
const UMAAL_MI
const UMAAL_NE
const UMAAL_PL
const UMAAL_VC
const UMAAL_VS
const UMAAL_ZZ
const UMLAL
const UMLAL_CC
const UMLAL_CS
const UMLAL_EQ
const UMLAL_GE
const UMLAL_GT
const UMLAL_HI
const UMLAL_LE
const UMLAL_LS
const UMLAL_LT
const UMLAL_MI
const UMLAL_NE
const UMLAL_PL
const UMLAL_S
const UMLAL_S_CC
const UMLAL_S_CS
const UMLAL_S_EQ
const UMLAL_S_GE
const UMLAL_S_GT
const UMLAL_S_HI
const UMLAL_S_LE
const UMLAL_S_LS
const UMLAL_S_LT
const UMLAL_S_MI
const UMLAL_S_NE
const UMLAL_S_PL
const UMLAL_S_VC
const UMLAL_S_VS
const UMLAL_S_ZZ
const UMLAL_VC
const UMLAL_VS
const UMLAL_ZZ
const UMULL
const UMULL_CC
const UMULL_CS
const UMULL_EQ
const UMULL_GE
const UMULL_GT
const UMULL_HI
const UMULL_LE
const UMULL_LS
const UMULL_LT
const UMULL_MI
const UMULL_NE
const UMULL_PL
const UMULL_S
const UMULL_S_CC
const UMULL_S_CS
const UMULL_S_EQ
const UMULL_S_GE
const UMULL_S_GT
const UMULL_S_HI
const UMULL_S_LE
const UMULL_S_LS
const UMULL_S_LT
const UMULL_S_MI
const UMULL_S_NE
const UMULL_S_PL
const UMULL_S_VC
const UMULL_S_VS
const UMULL_S_ZZ
const UMULL_VC
const UMULL_VS
const UMULL_ZZ
const UNDEF
const UQADD16
const UQADD16_CC
const UQADD16_CS
const UQADD16_EQ
const UQADD16_GE
const UQADD16_GT
const UQADD16_HI
const UQADD16_LE
const UQADD16_LS
const UQADD16_LT
const UQADD16_MI
const UQADD16_NE
const UQADD16_PL
const UQADD16_VC
const UQADD16_VS
const UQADD16_ZZ
const UQADD8
const UQADD8_CC
const UQADD8_CS
const UQADD8_EQ
const UQADD8_GE
const UQADD8_GT
const UQADD8_HI
const UQADD8_LE
const UQADD8_LS
const UQADD8_LT
const UQADD8_MI
const UQADD8_NE
const UQADD8_PL
const UQADD8_VC
const UQADD8_VS
const UQADD8_ZZ
const UQASX
const UQASX_CC
const UQASX_CS
const UQASX_EQ
const UQASX_GE
const UQASX_GT
const UQASX_HI
const UQASX_LE
const UQASX_LS
const UQASX_LT
const UQASX_MI
const UQASX_NE
const UQASX_PL
const UQASX_VC
const UQASX_VS
const UQASX_ZZ
const UQSAX
const UQSAX_CC
const UQSAX_CS
const UQSAX_EQ
const UQSAX_GE
const UQSAX_GT
const UQSAX_HI
const UQSAX_LE
const UQSAX_LS
const UQSAX_LT
const UQSAX_MI
const UQSAX_NE
const UQSAX_PL
const UQSAX_VC
const UQSAX_VS
const UQSAX_ZZ
const UQSUB16
const UQSUB16_CC
const UQSUB16_CS
const UQSUB16_EQ
const UQSUB16_GE
const UQSUB16_GT
const UQSUB16_HI
const UQSUB16_LE
const UQSUB16_LS
const UQSUB16_LT
const UQSUB16_MI
const UQSUB16_NE
const UQSUB16_PL
const UQSUB16_VC
const UQSUB16_VS
const UQSUB16_ZZ
const UQSUB8
const UQSUB8_CC
const UQSUB8_CS
const UQSUB8_EQ
const UQSUB8_GE
const UQSUB8_GT
const UQSUB8_HI
const UQSUB8_LE
const UQSUB8_LS
const UQSUB8_LT
const UQSUB8_MI
const UQSUB8_NE
const UQSUB8_PL
const UQSUB8_VC
const UQSUB8_VS
const UQSUB8_ZZ
const USAD8
const USAD8_CC
const USAD8_CS
const USAD8_EQ
const USAD8_GE
const USAD8_GT
const USAD8_HI
const USAD8_LE
const USAD8_LS
const USAD8_LT
const USAD8_MI
const USAD8_NE
const USAD8_PL
const USAD8_VC
const USAD8_VS
const USAD8_ZZ
const USADA8
const USADA8_CC
const USADA8_CS
const USADA8_EQ
const USADA8_GE
const USADA8_GT
const USADA8_HI
const USADA8_LE
const USADA8_LS
const USADA8_LT
const USADA8_MI
const USADA8_NE
const USADA8_PL
const USADA8_VC
const USADA8_VS
const USADA8_ZZ
const USAT
const USAT16
const USAT16_CC
const USAT16_CS
const USAT16_EQ
const USAT16_GE
const USAT16_GT
const USAT16_HI
const USAT16_LE
const USAT16_LS
const USAT16_LT
const USAT16_MI
const USAT16_NE
const USAT16_PL
const USAT16_VC
const USAT16_VS
const USAT16_ZZ
const USAT_CC
const USAT_CS
const USAT_EQ
const USAT_GE
const USAT_GT
const USAT_HI
const USAT_LE
const USAT_LS
const USAT_LT
const USAT_MI
const USAT_NE
const USAT_PL
const USAT_VC
const USAT_VS
const USAT_ZZ
const USAX
const USAX_CC
const USAX_CS
const USAX_EQ
const USAX_GE
const USAX_GT
const USAX_HI
const USAX_LE
const USAX_LS
const USAX_LT
const USAX_MI
const USAX_NE
const USAX_PL
const USAX_VC
const USAX_VS
const USAX_ZZ
const USUB16
const USUB16_CC
const USUB16_CS
const USUB16_EQ
const USUB16_GE
const USUB16_GT
const USUB16_HI
const USUB16_LE
const USUB16_LS
const USUB16_LT
const USUB16_MI
const USUB16_NE
const USUB16_PL
const USUB16_VC
const USUB16_VS
const USUB16_ZZ
const USUB8
const USUB8_CC
const USUB8_CS
const USUB8_EQ
const USUB8_GE
const USUB8_GT
const USUB8_HI
const USUB8_LE
const USUB8_LS
const USUB8_LT
const USUB8_MI
const USUB8_NE
const USUB8_PL
const USUB8_VC
const USUB8_VS
const USUB8_ZZ
const UXTAB
const UXTAB16
const UXTAB16_CC
const UXTAB16_CS
const UXTAB16_EQ
const UXTAB16_GE
const UXTAB16_GT
const UXTAB16_HI
const UXTAB16_LE
const UXTAB16_LS
const UXTAB16_LT
const UXTAB16_MI
const UXTAB16_NE
const UXTAB16_PL
const UXTAB16_VC
const UXTAB16_VS
const UXTAB16_ZZ
const UXTAB_CC
const UXTAB_CS
const UXTAB_EQ
const UXTAB_GE
const UXTAB_GT
const UXTAB_HI
const UXTAB_LE
const UXTAB_LS
const UXTAB_LT
const UXTAB_MI
const UXTAB_NE
const UXTAB_PL
const UXTAB_VC
const UXTAB_VS
const UXTAB_ZZ
const UXTAH
const UXTAH_CC
const UXTAH_CS
const UXTAH_EQ
const UXTAH_GE
const UXTAH_GT
const UXTAH_HI
const UXTAH_LE
const UXTAH_LS
const UXTAH_LT
const UXTAH_MI
const UXTAH_NE
const UXTAH_PL
const UXTAH_VC
const UXTAH_VS
const UXTAH_ZZ
const UXTB
const UXTB16
const UXTB16_CC
const UXTB16_CS
const UXTB16_EQ
const UXTB16_GE
const UXTB16_GT
const UXTB16_HI
const UXTB16_LE
const UXTB16_LS
const UXTB16_LT
const UXTB16_MI
const UXTB16_NE
const UXTB16_PL
const UXTB16_VC
const UXTB16_VS
const UXTB16_ZZ
const UXTB_CC
const UXTB_CS
const UXTB_EQ
const UXTB_GE
const UXTB_GT
const UXTB_HI
const UXTB_LE
const UXTB_LS
const UXTB_LT
const UXTB_MI
const UXTB_NE
const UXTB_PL
const UXTB_VC
const UXTB_VS
const UXTB_ZZ
const UXTH
const UXTH_CC
const UXTH_CS
const UXTH_EQ
const UXTH_GE
const UXTH_GT
const UXTH_HI
const UXTH_LE
const UXTH_LS
const UXTH_LT
const UXTH_MI
const UXTH_NE
const UXTH_PL
const UXTH_VC
const UXTH_VS
const UXTH_ZZ
const VABS_CC_F32
const VABS_CC_F64
const VABS_CS_F32
const VABS_CS_F64
const VABS_EQ_F32
const VABS_EQ_F64
const VABS_F32
const VABS_F64
const VABS_GE_F32
const VABS_GE_F64
const VABS_GT_F32
const VABS_GT_F64
const VABS_HI_F32
const VABS_HI_F64
const VABS_LE_F32
const VABS_LE_F64
const VABS_LS_F32
const VABS_LS_F64
const VABS_LT_F32
const VABS_LT_F64
const VABS_MI_F32
const VABS_MI_F64
const VABS_NE_F32
const VABS_NE_F64
const VABS_PL_F32
const VABS_PL_F64
const VABS_VC_F32
const VABS_VC_F64
const VABS_VS_F32
const VABS_VS_F64
const VABS_ZZ_F32
const VABS_ZZ_F64
const VADD_CC_F32
const VADD_CC_F64
const VADD_CS_F32
const VADD_CS_F64
const VADD_EQ_F32
const VADD_EQ_F64
const VADD_F32
const VADD_F64
const VADD_GE_F32
const VADD_GE_F64
const VADD_GT_F32
const VADD_GT_F64
const VADD_HI_F32
const VADD_HI_F64
const VADD_LE_F32
const VADD_LE_F64
const VADD_LS_F32
const VADD_LS_F64
const VADD_LT_F32
const VADD_LT_F64
const VADD_MI_F32
const VADD_MI_F64
const VADD_NE_F32
const VADD_NE_F64
const VADD_PL_F32
const VADD_PL_F64
const VADD_VC_F32
const VADD_VC_F64
const VADD_VS_F32
const VADD_VS_F64
const VADD_ZZ_F32
const VADD_ZZ_F64
const VCMP_CC_F32
const VCMP_CC_F64
const VCMP_CS_F32
const VCMP_CS_F64
const VCMP_EQ_F32
const VCMP_EQ_F64
const VCMP_E_CC_F32
const VCMP_E_CC_F64
const VCMP_E_CS_F32
const VCMP_E_CS_F64
const VCMP_E_EQ_F32
const VCMP_E_EQ_F64
const VCMP_E_F32
const VCMP_E_F64
const VCMP_E_GE_F32
const VCMP_E_GE_F64
const VCMP_E_GT_F32
const VCMP_E_GT_F64
const VCMP_E_HI_F32
const VCMP_E_HI_F64
const VCMP_E_LE_F32
const VCMP_E_LE_F64
const VCMP_E_LS_F32
const VCMP_E_LS_F64
const VCMP_E_LT_F32
const VCMP_E_LT_F64
const VCMP_E_MI_F32
const VCMP_E_MI_F64
const VCMP_E_NE_F32
const VCMP_E_NE_F64
const VCMP_E_PL_F32
const VCMP_E_PL_F64
const VCMP_E_VC_F32
const VCMP_E_VC_F64
const VCMP_E_VS_F32
const VCMP_E_VS_F64
const VCMP_E_ZZ_F32
const VCMP_E_ZZ_F64
const VCMP_F32
const VCMP_F64
const VCMP_GE_F32
const VCMP_GE_F64
const VCMP_GT_F32
const VCMP_GT_F64
const VCMP_HI_F32
const VCMP_HI_F64
const VCMP_LE_F32
const VCMP_LE_F64
const VCMP_LS_F32
const VCMP_LS_F64
const VCMP_LT_F32
const VCMP_LT_F64
const VCMP_MI_F32
const VCMP_MI_F64
const VCMP_NE_F32
const VCMP_NE_F64
const VCMP_PL_F32
const VCMP_PL_F64
const VCMP_VC_F32
const VCMP_VC_F64
const VCMP_VS_F32
const VCMP_VS_F64
const VCMP_ZZ_F32
const VCMP_ZZ_F64
const VCVTB_CC_F16_F32
const VCVTB_CC_F32_F16
const VCVTB_CS_F16_F32
const VCVTB_CS_F32_F16
const VCVTB_EQ_F16_F32
const VCVTB_EQ_F32_F16
const VCVTB_F16_F32
const VCVTB_F32_F16
const VCVTB_GE_F16_F32
const VCVTB_GE_F32_F16
const VCVTB_GT_F16_F32
const VCVTB_GT_F32_F16
const VCVTB_HI_F16_F32
const VCVTB_HI_F32_F16
const VCVTB_LE_F16_F32
const VCVTB_LE_F32_F16
const VCVTB_LS_F16_F32
const VCVTB_LS_F32_F16
const VCVTB_LT_F16_F32
const VCVTB_LT_F32_F16
const VCVTB_MI_F16_F32
const VCVTB_MI_F32_F16
const VCVTB_NE_F16_F32
const VCVTB_NE_F32_F16
const VCVTB_PL_F16_F32
const VCVTB_PL_F32_F16
const VCVTB_VC_F16_F32
const VCVTB_VC_F32_F16
const VCVTB_VS_F16_F32
const VCVTB_VS_F32_F16
const VCVTB_ZZ_F16_F32
const VCVTB_ZZ_F32_F16
const VCVTR_CC_S32_F32
const VCVTR_CC_S32_F64
const VCVTR_CC_U32_F32
const VCVTR_CC_U32_F64
const VCVTR_CS_S32_F32
const VCVTR_CS_S32_F64
const VCVTR_CS_U32_F32
const VCVTR_CS_U32_F64
const VCVTR_EQ_S32_F32
const VCVTR_EQ_S32_F64
const VCVTR_EQ_U32_F32
const VCVTR_EQ_U32_F64
const VCVTR_GE_S32_F32
const VCVTR_GE_S32_F64
const VCVTR_GE_U32_F32
const VCVTR_GE_U32_F64
const VCVTR_GT_S32_F32
const VCVTR_GT_S32_F64
const VCVTR_GT_U32_F32
const VCVTR_GT_U32_F64
const VCVTR_HI_S32_F32
const VCVTR_HI_S32_F64
const VCVTR_HI_U32_F32
const VCVTR_HI_U32_F64
const VCVTR_LE_S32_F32
const VCVTR_LE_S32_F64
const VCVTR_LE_U32_F32
const VCVTR_LE_U32_F64
const VCVTR_LS_S32_F32
const VCVTR_LS_S32_F64
const VCVTR_LS_U32_F32
const VCVTR_LS_U32_F64
const VCVTR_LT_S32_F32
const VCVTR_LT_S32_F64
const VCVTR_LT_U32_F32
const VCVTR_LT_U32_F64
const VCVTR_MI_S32_F32
const VCVTR_MI_S32_F64
const VCVTR_MI_U32_F32
const VCVTR_MI_U32_F64
const VCVTR_NE_S32_F32
const VCVTR_NE_S32_F64
const VCVTR_NE_U32_F32
const VCVTR_NE_U32_F64
const VCVTR_PL_S32_F32
const VCVTR_PL_S32_F64
const VCVTR_PL_U32_F32
const VCVTR_PL_U32_F64
const VCVTR_S32_F32
const VCVTR_S32_F64
const VCVTR_U32_F32
const VCVTR_U32_F64
const VCVTR_VC_S32_F32
const VCVTR_VC_S32_F64
const VCVTR_VC_U32_F32
const VCVTR_VC_U32_F64
const VCVTR_VS_S32_F32
const VCVTR_VS_S32_F64
const VCVTR_VS_U32_F32
const VCVTR_VS_U32_F64
const VCVTR_ZZ_S32_F32
const VCVTR_ZZ_S32_F64
const VCVTR_ZZ_U32_F32
const VCVTR_ZZ_U32_F64
const VCVTT_CC_F16_F32
const VCVTT_CC_F32_F16
const VCVTT_CS_F16_F32
const VCVTT_CS_F32_F16
const VCVTT_EQ_F16_F32
const VCVTT_EQ_F32_F16
const VCVTT_F16_F32
const VCVTT_F32_F16
const VCVTT_GE_F16_F32
const VCVTT_GE_F32_F16
const VCVTT_GT_F16_F32
const VCVTT_GT_F32_F16
const VCVTT_HI_F16_F32
const VCVTT_HI_F32_F16
const VCVTT_LE_F16_F32
const VCVTT_LE_F32_F16
const VCVTT_LS_F16_F32
const VCVTT_LS_F32_F16
const VCVTT_LT_F16_F32
const VCVTT_LT_F32_F16
const VCVTT_MI_F16_F32
const VCVTT_MI_F32_F16
const VCVTT_NE_F16_F32
const VCVTT_NE_F32_F16
const VCVTT_PL_F16_F32
const VCVTT_PL_F32_F16
const VCVTT_VC_F16_F32
const VCVTT_VC_F32_F16
const VCVTT_VS_F16_F32
const VCVTT_VS_F32_F16
const VCVTT_ZZ_F16_F32
const VCVTT_ZZ_F32_F16
const VCVT_CC_F32_F64
const VCVT_CC_F32_FXS16
const VCVT_CC_F32_FXS32
const VCVT_CC_F32_FXU16
const VCVT_CC_F32_FXU32
const VCVT_CC_F32_S32
const VCVT_CC_F32_U32
const VCVT_CC_F64_F32
const VCVT_CC_F64_FXS16
const VCVT_CC_F64_FXS32
const VCVT_CC_F64_FXU16
const VCVT_CC_F64_FXU32
const VCVT_CC_F64_S32
const VCVT_CC_F64_U32
const VCVT_CC_FXS16_F32
const VCVT_CC_FXS16_F64
const VCVT_CC_FXS32_F32
const VCVT_CC_FXS32_F64
const VCVT_CC_FXU16_F32
const VCVT_CC_FXU16_F64
const VCVT_CC_FXU32_F32
const VCVT_CC_FXU32_F64
const VCVT_CC_S32_F32
const VCVT_CC_S32_F64
const VCVT_CC_U32_F32
const VCVT_CC_U32_F64
const VCVT_CS_F32_F64
const VCVT_CS_F32_FXS16
const VCVT_CS_F32_FXS32
const VCVT_CS_F32_FXU16
const VCVT_CS_F32_FXU32
const VCVT_CS_F32_S32
const VCVT_CS_F32_U32
const VCVT_CS_F64_F32
const VCVT_CS_F64_FXS16
const VCVT_CS_F64_FXS32
const VCVT_CS_F64_FXU16
const VCVT_CS_F64_FXU32
const VCVT_CS_F64_S32
const VCVT_CS_F64_U32
const VCVT_CS_FXS16_F32
const VCVT_CS_FXS16_F64
const VCVT_CS_FXS32_F32
const VCVT_CS_FXS32_F64
const VCVT_CS_FXU16_F32
const VCVT_CS_FXU16_F64
const VCVT_CS_FXU32_F32
const VCVT_CS_FXU32_F64
const VCVT_CS_S32_F32
const VCVT_CS_S32_F64
const VCVT_CS_U32_F32
const VCVT_CS_U32_F64
const VCVT_EQ_F32_F64
const VCVT_EQ_F32_FXS16
const VCVT_EQ_F32_FXS32
const VCVT_EQ_F32_FXU16
const VCVT_EQ_F32_FXU32
const VCVT_EQ_F32_S32
const VCVT_EQ_F32_U32
const VCVT_EQ_F64_F32
const VCVT_EQ_F64_FXS16
const VCVT_EQ_F64_FXS32
const VCVT_EQ_F64_FXU16
const VCVT_EQ_F64_FXU32
const VCVT_EQ_F64_S32
const VCVT_EQ_F64_U32
const VCVT_EQ_FXS16_F32
const VCVT_EQ_FXS16_F64
const VCVT_EQ_FXS32_F32
const VCVT_EQ_FXS32_F64
const VCVT_EQ_FXU16_F32
const VCVT_EQ_FXU16_F64
const VCVT_EQ_FXU32_F32
const VCVT_EQ_FXU32_F64
const VCVT_EQ_S32_F32
const VCVT_EQ_S32_F64
const VCVT_EQ_U32_F32
const VCVT_EQ_U32_F64
const VCVT_F32_F64
const VCVT_F32_FXS16
const VCVT_F32_FXS32
const VCVT_F32_FXU16
const VCVT_F32_FXU32
const VCVT_F32_S32
const VCVT_F32_U32
const VCVT_F64_F32
const VCVT_F64_FXS16
const VCVT_F64_FXS32
const VCVT_F64_FXU16
const VCVT_F64_FXU32
const VCVT_F64_S32
const VCVT_F64_U32
const VCVT_FXS16_F32
const VCVT_FXS16_F64
const VCVT_FXS32_F32
const VCVT_FXS32_F64
const VCVT_FXU16_F32
const VCVT_FXU16_F64
const VCVT_FXU32_F32
const VCVT_FXU32_F64
const VCVT_GE_F32_F64
const VCVT_GE_F32_FXS16
const VCVT_GE_F32_FXS32
const VCVT_GE_F32_FXU16
const VCVT_GE_F32_FXU32
const VCVT_GE_F32_S32
const VCVT_GE_F32_U32
const VCVT_GE_F64_F32
const VCVT_GE_F64_FXS16
const VCVT_GE_F64_FXS32
const VCVT_GE_F64_FXU16
const VCVT_GE_F64_FXU32
const VCVT_GE_F64_S32
const VCVT_GE_F64_U32
const VCVT_GE_FXS16_F32
const VCVT_GE_FXS16_F64
const VCVT_GE_FXS32_F32
const VCVT_GE_FXS32_F64
const VCVT_GE_FXU16_F32
const VCVT_GE_FXU16_F64
const VCVT_GE_FXU32_F32
const VCVT_GE_FXU32_F64
const VCVT_GE_S32_F32
const VCVT_GE_S32_F64
const VCVT_GE_U32_F32
const VCVT_GE_U32_F64
const VCVT_GT_F32_F64
const VCVT_GT_F32_FXS16
const VCVT_GT_F32_FXS32
const VCVT_GT_F32_FXU16
const VCVT_GT_F32_FXU32
const VCVT_GT_F32_S32
const VCVT_GT_F32_U32
const VCVT_GT_F64_F32
const VCVT_GT_F64_FXS16
const VCVT_GT_F64_FXS32
const VCVT_GT_F64_FXU16
const VCVT_GT_F64_FXU32
const VCVT_GT_F64_S32
const VCVT_GT_F64_U32
const VCVT_GT_FXS16_F32
const VCVT_GT_FXS16_F64
const VCVT_GT_FXS32_F32
const VCVT_GT_FXS32_F64
const VCVT_GT_FXU16_F32
const VCVT_GT_FXU16_F64
const VCVT_GT_FXU32_F32
const VCVT_GT_FXU32_F64
const VCVT_GT_S32_F32
const VCVT_GT_S32_F64
const VCVT_GT_U32_F32
const VCVT_GT_U32_F64
const VCVT_HI_F32_F64
const VCVT_HI_F32_FXS16
const VCVT_HI_F32_FXS32
const VCVT_HI_F32_FXU16
const VCVT_HI_F32_FXU32
const VCVT_HI_F32_S32
const VCVT_HI_F32_U32
const VCVT_HI_F64_F32
const VCVT_HI_F64_FXS16
const VCVT_HI_F64_FXS32
const VCVT_HI_F64_FXU16
const VCVT_HI_F64_FXU32
const VCVT_HI_F64_S32
const VCVT_HI_F64_U32
const VCVT_HI_FXS16_F32
const VCVT_HI_FXS16_F64
const VCVT_HI_FXS32_F32
const VCVT_HI_FXS32_F64
const VCVT_HI_FXU16_F32
const VCVT_HI_FXU16_F64
const VCVT_HI_FXU32_F32
const VCVT_HI_FXU32_F64
const VCVT_HI_S32_F32
const VCVT_HI_S32_F64
const VCVT_HI_U32_F32
const VCVT_HI_U32_F64
const VCVT_LE_F32_F64
const VCVT_LE_F32_FXS16
const VCVT_LE_F32_FXS32
const VCVT_LE_F32_FXU16
const VCVT_LE_F32_FXU32
const VCVT_LE_F32_S32
const VCVT_LE_F32_U32
const VCVT_LE_F64_F32
const VCVT_LE_F64_FXS16
const VCVT_LE_F64_FXS32
const VCVT_LE_F64_FXU16
const VCVT_LE_F64_FXU32
const VCVT_LE_F64_S32
const VCVT_LE_F64_U32
const VCVT_LE_FXS16_F32
const VCVT_LE_FXS16_F64
const VCVT_LE_FXS32_F32
const VCVT_LE_FXS32_F64
const VCVT_LE_FXU16_F32
const VCVT_LE_FXU16_F64
const VCVT_LE_FXU32_F32
const VCVT_LE_FXU32_F64
const VCVT_LE_S32_F32
const VCVT_LE_S32_F64
const VCVT_LE_U32_F32
const VCVT_LE_U32_F64
const VCVT_LS_F32_F64
const VCVT_LS_F32_FXS16
const VCVT_LS_F32_FXS32
const VCVT_LS_F32_FXU16
const VCVT_LS_F32_FXU32
const VCVT_LS_F32_S32
const VCVT_LS_F32_U32
const VCVT_LS_F64_F32
const VCVT_LS_F64_FXS16
const VCVT_LS_F64_FXS32
const VCVT_LS_F64_FXU16
const VCVT_LS_F64_FXU32
const VCVT_LS_F64_S32
const VCVT_LS_F64_U32
const VCVT_LS_FXS16_F32
const VCVT_LS_FXS16_F64
const VCVT_LS_FXS32_F32
const VCVT_LS_FXS32_F64
const VCVT_LS_FXU16_F32
const VCVT_LS_FXU16_F64
const VCVT_LS_FXU32_F32
const VCVT_LS_FXU32_F64
const VCVT_LS_S32_F32
const VCVT_LS_S32_F64
const VCVT_LS_U32_F32
const VCVT_LS_U32_F64
const VCVT_LT_F32_F64
const VCVT_LT_F32_FXS16
const VCVT_LT_F32_FXS32
const VCVT_LT_F32_FXU16
const VCVT_LT_F32_FXU32
const VCVT_LT_F32_S32
const VCVT_LT_F32_U32
const VCVT_LT_F64_F32
const VCVT_LT_F64_FXS16
const VCVT_LT_F64_FXS32
const VCVT_LT_F64_FXU16
const VCVT_LT_F64_FXU32
const VCVT_LT_F64_S32
const VCVT_LT_F64_U32
const VCVT_LT_FXS16_F32
const VCVT_LT_FXS16_F64
const VCVT_LT_FXS32_F32
const VCVT_LT_FXS32_F64
const VCVT_LT_FXU16_F32
const VCVT_LT_FXU16_F64
const VCVT_LT_FXU32_F32
const VCVT_LT_FXU32_F64
const VCVT_LT_S32_F32
const VCVT_LT_S32_F64
const VCVT_LT_U32_F32
const VCVT_LT_U32_F64
const VCVT_MI_F32_F64
const VCVT_MI_F32_FXS16
const VCVT_MI_F32_FXS32
const VCVT_MI_F32_FXU16
const VCVT_MI_F32_FXU32
const VCVT_MI_F32_S32
const VCVT_MI_F32_U32
const VCVT_MI_F64_F32
const VCVT_MI_F64_FXS16
const VCVT_MI_F64_FXS32
const VCVT_MI_F64_FXU16
const VCVT_MI_F64_FXU32
const VCVT_MI_F64_S32
const VCVT_MI_F64_U32
const VCVT_MI_FXS16_F32
const VCVT_MI_FXS16_F64
const VCVT_MI_FXS32_F32
const VCVT_MI_FXS32_F64
const VCVT_MI_FXU16_F32
const VCVT_MI_FXU16_F64
const VCVT_MI_FXU32_F32
const VCVT_MI_FXU32_F64
const VCVT_MI_S32_F32
const VCVT_MI_S32_F64
const VCVT_MI_U32_F32
const VCVT_MI_U32_F64
const VCVT_NE_F32_F64
const VCVT_NE_F32_FXS16
const VCVT_NE_F32_FXS32
const VCVT_NE_F32_FXU16
const VCVT_NE_F32_FXU32
const VCVT_NE_F32_S32
const VCVT_NE_F32_U32
const VCVT_NE_F64_F32
const VCVT_NE_F64_FXS16
const VCVT_NE_F64_FXS32
const VCVT_NE_F64_FXU16
const VCVT_NE_F64_FXU32
const VCVT_NE_F64_S32
const VCVT_NE_F64_U32
const VCVT_NE_FXS16_F32
const VCVT_NE_FXS16_F64
const VCVT_NE_FXS32_F32
const VCVT_NE_FXS32_F64
const VCVT_NE_FXU16_F32
const VCVT_NE_FXU16_F64
const VCVT_NE_FXU32_F32
const VCVT_NE_FXU32_F64
const VCVT_NE_S32_F32
const VCVT_NE_S32_F64
const VCVT_NE_U32_F32
const VCVT_NE_U32_F64
const VCVT_PL_F32_F64
const VCVT_PL_F32_FXS16
const VCVT_PL_F32_FXS32
const VCVT_PL_F32_FXU16
const VCVT_PL_F32_FXU32
const VCVT_PL_F32_S32
const VCVT_PL_F32_U32
const VCVT_PL_F64_F32
const VCVT_PL_F64_FXS16
const VCVT_PL_F64_FXS32
const VCVT_PL_F64_FXU16
const VCVT_PL_F64_FXU32
const VCVT_PL_F64_S32
const VCVT_PL_F64_U32
const VCVT_PL_FXS16_F32
const VCVT_PL_FXS16_F64
const VCVT_PL_FXS32_F32
const VCVT_PL_FXS32_F64
const VCVT_PL_FXU16_F32
const VCVT_PL_FXU16_F64
const VCVT_PL_FXU32_F32
const VCVT_PL_FXU32_F64
const VCVT_PL_S32_F32
const VCVT_PL_S32_F64
const VCVT_PL_U32_F32
const VCVT_PL_U32_F64
const VCVT_S32_F32
const VCVT_S32_F64
const VCVT_U32_F32
const VCVT_U32_F64
const VCVT_VC_F32_F64
const VCVT_VC_F32_FXS16
const VCVT_VC_F32_FXS32
const VCVT_VC_F32_FXU16
const VCVT_VC_F32_FXU32
const VCVT_VC_F32_S32
const VCVT_VC_F32_U32
const VCVT_VC_F64_F32
const VCVT_VC_F64_FXS16
const VCVT_VC_F64_FXS32
const VCVT_VC_F64_FXU16
const VCVT_VC_F64_FXU32
const VCVT_VC_F64_S32
const VCVT_VC_F64_U32
const VCVT_VC_FXS16_F32
const VCVT_VC_FXS16_F64
const VCVT_VC_FXS32_F32
const VCVT_VC_FXS32_F64
const VCVT_VC_FXU16_F32
const VCVT_VC_FXU16_F64
const VCVT_VC_FXU32_F32
const VCVT_VC_FXU32_F64
const VCVT_VC_S32_F32
const VCVT_VC_S32_F64
const VCVT_VC_U32_F32
const VCVT_VC_U32_F64
const VCVT_VS_F32_F64
const VCVT_VS_F32_FXS16
const VCVT_VS_F32_FXS32
const VCVT_VS_F32_FXU16
const VCVT_VS_F32_FXU32
const VCVT_VS_F32_S32
const VCVT_VS_F32_U32
const VCVT_VS_F64_F32
const VCVT_VS_F64_FXS16
const VCVT_VS_F64_FXS32
const VCVT_VS_F64_FXU16
const VCVT_VS_F64_FXU32
const VCVT_VS_F64_S32
const VCVT_VS_F64_U32
const VCVT_VS_FXS16_F32
const VCVT_VS_FXS16_F64
const VCVT_VS_FXS32_F32
const VCVT_VS_FXS32_F64
const VCVT_VS_FXU16_F32
const VCVT_VS_FXU16_F64
const VCVT_VS_FXU32_F32
const VCVT_VS_FXU32_F64
const VCVT_VS_S32_F32
const VCVT_VS_S32_F64
const VCVT_VS_U32_F32
const VCVT_VS_U32_F64
const VCVT_ZZ_F32_F64
const VCVT_ZZ_F32_FXS16
const VCVT_ZZ_F32_FXS32
const VCVT_ZZ_F32_FXU16
const VCVT_ZZ_F32_FXU32
const VCVT_ZZ_F32_S32
const VCVT_ZZ_F32_U32
const VCVT_ZZ_F64_F32
const VCVT_ZZ_F64_FXS16
const VCVT_ZZ_F64_FXS32
const VCVT_ZZ_F64_FXU16
const VCVT_ZZ_F64_FXU32
const VCVT_ZZ_F64_S32
const VCVT_ZZ_F64_U32
const VCVT_ZZ_FXS16_F32
const VCVT_ZZ_FXS16_F64
const VCVT_ZZ_FXS32_F32
const VCVT_ZZ_FXS32_F64
const VCVT_ZZ_FXU16_F32
const VCVT_ZZ_FXU16_F64
const VCVT_ZZ_FXU32_F32
const VCVT_ZZ_FXU32_F64
const VCVT_ZZ_S32_F32
const VCVT_ZZ_S32_F64
const VCVT_ZZ_U32_F32
const VCVT_ZZ_U32_F64
const VDIV_CC_F32
const VDIV_CC_F64
const VDIV_CS_F32
const VDIV_CS_F64
const VDIV_EQ_F32
const VDIV_EQ_F64
const VDIV_F32
const VDIV_F64
const VDIV_GE_F32
const VDIV_GE_F64
const VDIV_GT_F32
const VDIV_GT_F64
const VDIV_HI_F32
const VDIV_HI_F64
const VDIV_LE_F32
const VDIV_LE_F64
const VDIV_LS_F32
const VDIV_LS_F64
const VDIV_LT_F32
const VDIV_LT_F64
const VDIV_MI_F32
const VDIV_MI_F64
const VDIV_NE_F32
const VDIV_NE_F64
const VDIV_PL_F32
const VDIV_PL_F64
const VDIV_VC_F32
const VDIV_VC_F64
const VDIV_VS_F32
const VDIV_VS_F64
const VDIV_ZZ_F32
const VDIV_ZZ_F64
const VLDR
const VLDR_CC
const VLDR_CS
const VLDR_EQ
const VLDR_GE
const VLDR_GT
const VLDR_HI
const VLDR_LE
const VLDR_LS
const VLDR_LT
const VLDR_MI
const VLDR_NE
const VLDR_PL
const VLDR_VC
const VLDR_VS
const VLDR_ZZ
const VMLA_CC_F32
const VMLA_CC_F64
const VMLA_CS_F32
const VMLA_CS_F64
const VMLA_EQ_F32
const VMLA_EQ_F64
const VMLA_F32
const VMLA_F64
const VMLA_GE_F32
const VMLA_GE_F64
const VMLA_GT_F32
const VMLA_GT_F64
const VMLA_HI_F32
const VMLA_HI_F64
const VMLA_LE_F32
const VMLA_LE_F64
const VMLA_LS_F32
const VMLA_LS_F64
const VMLA_LT_F32
const VMLA_LT_F64
const VMLA_MI_F32
const VMLA_MI_F64
const VMLA_NE_F32
const VMLA_NE_F64
const VMLA_PL_F32
const VMLA_PL_F64
const VMLA_VC_F32
const VMLA_VC_F64
const VMLA_VS_F32
const VMLA_VS_F64
const VMLA_ZZ_F32
const VMLA_ZZ_F64
const VMLS_CC_F32
const VMLS_CC_F64
const VMLS_CS_F32
const VMLS_CS_F64
const VMLS_EQ_F32
const VMLS_EQ_F64
const VMLS_F32
const VMLS_F64
const VMLS_GE_F32
const VMLS_GE_F64
const VMLS_GT_F32
const VMLS_GT_F64
const VMLS_HI_F32
const VMLS_HI_F64
const VMLS_LE_F32
const VMLS_LE_F64
const VMLS_LS_F32
const VMLS_LS_F64
const VMLS_LT_F32
const VMLS_LT_F64
const VMLS_MI_F32
const VMLS_MI_F64
const VMLS_NE_F32
const VMLS_NE_F64
const VMLS_PL_F32
const VMLS_PL_F64
const VMLS_VC_F32
const VMLS_VC_F64
const VMLS_VS_F32
const VMLS_VS_F64
const VMLS_ZZ_F32
const VMLS_ZZ_F64
const VMOV
const VMOV_32
const VMOV_CC
const VMOV_CC_32
const VMOV_CC_F32
const VMOV_CC_F64
const VMOV_CS
const VMOV_CS_32
const VMOV_CS_F32
const VMOV_CS_F64
const VMOV_EQ
const VMOV_EQ_32
const VMOV_EQ_F32
const VMOV_EQ_F64
const VMOV_F32
const VMOV_F64
const VMOV_GE
const VMOV_GE_32
const VMOV_GE_F32
const VMOV_GE_F64
const VMOV_GT
const VMOV_GT_32
const VMOV_GT_F32
const VMOV_GT_F64
const VMOV_HI
const VMOV_HI_32
const VMOV_HI_F32
const VMOV_HI_F64
const VMOV_LE
const VMOV_LE_32
const VMOV_LE_F32
const VMOV_LE_F64
const VMOV_LS
const VMOV_LS_32
const VMOV_LS_F32
const VMOV_LS_F64
const VMOV_LT
const VMOV_LT_32
const VMOV_LT_F32
const VMOV_LT_F64
const VMOV_MI
const VMOV_MI_32
const VMOV_MI_F32
const VMOV_MI_F64
const VMOV_NE
const VMOV_NE_32
const VMOV_NE_F32
const VMOV_NE_F64
const VMOV_PL
const VMOV_PL_32
const VMOV_PL_F32
const VMOV_PL_F64
const VMOV_VC
const VMOV_VC_32
const VMOV_VC_F32
const VMOV_VC_F64
const VMOV_VS
const VMOV_VS_32
const VMOV_VS_F32
const VMOV_VS_F64
const VMOV_ZZ
const VMOV_ZZ_32
const VMOV_ZZ_F32
const VMOV_ZZ_F64
const VMRS
const VMRS_CC
const VMRS_CS
const VMRS_EQ
const VMRS_GE
const VMRS_GT
const VMRS_HI
const VMRS_LE
const VMRS_LS
const VMRS_LT
const VMRS_MI
const VMRS_NE
const VMRS_PL
const VMRS_VC
const VMRS_VS
const VMRS_ZZ
const VMSR
const VMSR_CC
const VMSR_CS
const VMSR_EQ
const VMSR_GE
const VMSR_GT
const VMSR_HI
const VMSR_LE
const VMSR_LS
const VMSR_LT
const VMSR_MI
const VMSR_NE
const VMSR_PL
const VMSR_VC
const VMSR_VS
const VMSR_ZZ
const VMUL_CC_F32
const VMUL_CC_F64
const VMUL_CS_F32
const VMUL_CS_F64
const VMUL_EQ_F32
const VMUL_EQ_F64
const VMUL_F32
const VMUL_F64
const VMUL_GE_F32
const VMUL_GE_F64
const VMUL_GT_F32
const VMUL_GT_F64
const VMUL_HI_F32
const VMUL_HI_F64
const VMUL_LE_F32
const VMUL_LE_F64
const VMUL_LS_F32
const VMUL_LS_F64
const VMUL_LT_F32
const VMUL_LT_F64
const VMUL_MI_F32
const VMUL_MI_F64
const VMUL_NE_F32
const VMUL_NE_F64
const VMUL_PL_F32
const VMUL_PL_F64
const VMUL_VC_F32
const VMUL_VC_F64
const VMUL_VS_F32
const VMUL_VS_F64
const VMUL_ZZ_F32
const VMUL_ZZ_F64
const VNEG_CC_F32
const VNEG_CC_F64
const VNEG_CS_F32
const VNEG_CS_F64
const VNEG_EQ_F32
const VNEG_EQ_F64
const VNEG_F32
const VNEG_F64
const VNEG_GE_F32
const VNEG_GE_F64
const VNEG_GT_F32
const VNEG_GT_F64
const VNEG_HI_F32
const VNEG_HI_F64
const VNEG_LE_F32
const VNEG_LE_F64
const VNEG_LS_F32
const VNEG_LS_F64
const VNEG_LT_F32
const VNEG_LT_F64
const VNEG_MI_F32
const VNEG_MI_F64
const VNEG_NE_F32
const VNEG_NE_F64
const VNEG_PL_F32
const VNEG_PL_F64
const VNEG_VC_F32
const VNEG_VC_F64
const VNEG_VS_F32
const VNEG_VS_F64
const VNEG_ZZ_F32
const VNEG_ZZ_F64
const VNMLA_CC_F32
const VNMLA_CC_F64
const VNMLA_CS_F32
const VNMLA_CS_F64
const VNMLA_EQ_F32
const VNMLA_EQ_F64
const VNMLA_F32
const VNMLA_F64
const VNMLA_GE_F32
const VNMLA_GE_F64
const VNMLA_GT_F32
const VNMLA_GT_F64
const VNMLA_HI_F32
const VNMLA_HI_F64
const VNMLA_LE_F32
const VNMLA_LE_F64
const VNMLA_LS_F32
const VNMLA_LS_F64
const VNMLA_LT_F32
const VNMLA_LT_F64
const VNMLA_MI_F32
const VNMLA_MI_F64
const VNMLA_NE_F32
const VNMLA_NE_F64
const VNMLA_PL_F32
const VNMLA_PL_F64
const VNMLA_VC_F32
const VNMLA_VC_F64
const VNMLA_VS_F32
const VNMLA_VS_F64
const VNMLA_ZZ_F32
const VNMLA_ZZ_F64
const VNMLS_CC_F32
const VNMLS_CC_F64
const VNMLS_CS_F32
const VNMLS_CS_F64
const VNMLS_EQ_F32
const VNMLS_EQ_F64
const VNMLS_F32
const VNMLS_F64
const VNMLS_GE_F32
const VNMLS_GE_F64
const VNMLS_GT_F32
const VNMLS_GT_F64
const VNMLS_HI_F32
const VNMLS_HI_F64
const VNMLS_LE_F32
const VNMLS_LE_F64
const VNMLS_LS_F32
const VNMLS_LS_F64
const VNMLS_LT_F32
const VNMLS_LT_F64
const VNMLS_MI_F32
const VNMLS_MI_F64
const VNMLS_NE_F32
const VNMLS_NE_F64
const VNMLS_PL_F32
const VNMLS_PL_F64
const VNMLS_VC_F32
const VNMLS_VC_F64
const VNMLS_VS_F32
const VNMLS_VS_F64
const VNMLS_ZZ_F32
const VNMLS_ZZ_F64
const VNMUL_CC_F32
const VNMUL_CC_F64
const VNMUL_CS_F32
const VNMUL_CS_F64
const VNMUL_EQ_F32
const VNMUL_EQ_F64
const VNMUL_F32
const VNMUL_F64
const VNMUL_GE_F32
const VNMUL_GE_F64
const VNMUL_GT_F32
const VNMUL_GT_F64
const VNMUL_HI_F32
const VNMUL_HI_F64
const VNMUL_LE_F32
const VNMUL_LE_F64
const VNMUL_LS_F32
const VNMUL_LS_F64
const VNMUL_LT_F32
const VNMUL_LT_F64
const VNMUL_MI_F32
const VNMUL_MI_F64
const VNMUL_NE_F32
const VNMUL_NE_F64
const VNMUL_PL_F32
const VNMUL_PL_F64
const VNMUL_VC_F32
const VNMUL_VC_F64
const VNMUL_VS_F32
const VNMUL_VS_F64
const VNMUL_ZZ_F32
const VNMUL_ZZ_F64
const VSQRT_CC_F32
const VSQRT_CC_F64
const VSQRT_CS_F32
const VSQRT_CS_F64
const VSQRT_EQ_F32
const VSQRT_EQ_F64
const VSQRT_F32
const VSQRT_F64
const VSQRT_GE_F32
const VSQRT_GE_F64
const VSQRT_GT_F32
const VSQRT_GT_F64
const VSQRT_HI_F32
const VSQRT_HI_F64
const VSQRT_LE_F32
const VSQRT_LE_F64
const VSQRT_LS_F32
const VSQRT_LS_F64
const VSQRT_LT_F32
const VSQRT_LT_F64
const VSQRT_MI_F32
const VSQRT_MI_F64
const VSQRT_NE_F32
const VSQRT_NE_F64
const VSQRT_PL_F32
const VSQRT_PL_F64
const VSQRT_VC_F32
const VSQRT_VC_F64
const VSQRT_VS_F32
const VSQRT_VS_F64
const VSQRT_ZZ_F32
const VSQRT_ZZ_F64
const VSTR
const VSTR_CC
const VSTR_CS
const VSTR_EQ
const VSTR_GE
const VSTR_GT
const VSTR_HI
const VSTR_LE
const VSTR_LS
const VSTR_LT
const VSTR_MI
const VSTR_NE
const VSTR_PL
const VSTR_VC
const VSTR_VS
const VSTR_ZZ
const VSUB_CC_F32
const VSUB_CC_F64
const VSUB_CS_F32
const VSUB_CS_F64
const VSUB_EQ_F32
const VSUB_EQ_F64
const VSUB_F32
const VSUB_F64
const VSUB_GE_F32
const VSUB_GE_F64
const VSUB_GT_F32
const VSUB_GT_F64
const VSUB_HI_F32
const VSUB_HI_F64
const VSUB_LE_F32
const VSUB_LE_F64
const VSUB_LS_F32
const VSUB_LS_F64
const VSUB_LT_F32
const VSUB_LT_F64
const VSUB_MI_F32
const VSUB_MI_F64
const VSUB_NE_F32
const VSUB_NE_F64
const VSUB_PL_F32
const VSUB_PL_F64
const VSUB_VC_F32
const VSUB_VC_F64
const VSUB_VS_F32
const VSUB_VS_F64
const VSUB_ZZ_F32
const VSUB_ZZ_F64
const WFE
const WFE_CC
const WFE_CS
const WFE_EQ
const WFE_GE
const WFE_GT
const WFE_HI
const WFE_LE
const WFE_LS
const WFE_LT
const WFE_MI
const WFE_NE
const WFE_PL
const WFE_VC
const WFE_VS
const WFE_ZZ
const WFI
const WFI_CC
const WFI_CS
const WFI_EQ
const WFI_GE
const WFI_GT
const WFI_HI
const WFI_LE
const WFI_LS
const WFI_LT
const WFI_MI
const WFI_NE
const WFI_PL
const WFI_VC
const WFI_VS
const WFI_ZZ
const YIELD
const YIELD_CC
const YIELD_CS
const YIELD_EQ
const YIELD_GE
const YIELD_GT
const YIELD_HI
const YIELD_LE
const YIELD_LS
const YIELD_LT
const YIELD_MI
const YIELD_NE
const YIELD_PL
const YIELD_VC
const YIELD_VS
const YIELD_ZZ
const _
const _
const _
const _
const _
const _
const _
const _
const _ AddrMode = iota
const _ instArg = iota
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _ Mode = iota
const _
const _
const _
const _
const _ Op = iota
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const _
const arg_APSR
const arg_Dd_Sd
const arg_Dn_half
const arg_FPSCR
const arg_R1_0
const arg_R1_12
const arg_R2_0
const arg_R2_12
const arg_R_0
const arg_R_12
const arg_R_12_nzcv
const arg_R_16
const arg_R_16_WB
const arg_R_8
const arg_R_rotate
const arg_R_shift_R
const arg_R_shift_imm
const arg_SP
const arg_Sd
const arg_Sd_Dd
const arg_Sm
const arg_Sm_Dm
const arg_Sn
const arg_Sn_Dn
const arg_const
const arg_endian
const arg_fbits
const arg_fp_0
const arg_imm24
const arg_imm5
const arg_imm5_32
const arg_imm5_nz
const arg_imm_12at8_4at0
const arg_imm_4at16_12at0
const arg_imm_vfp
const arg_label24
const arg_label24H
const arg_label_m_12
const arg_label_p_12
const arg_label_pm_12
const arg_label_pm_4_4
const arg_lsb_width
const arg_mem_R
const arg_mem_R_pm_R_W
const arg_mem_R_pm_R_postindex
const arg_mem_R_pm_R_shift_imm_W
const arg_mem_R_pm_R_shift_imm_offset
const arg_mem_R_pm_R_shift_imm_postindex
const arg_mem_R_pm_imm12_W
const arg_mem_R_pm_imm12_offset
const arg_mem_R_pm_imm12_postindex
const arg_mem_R_pm_imm8_W
const arg_mem_R_pm_imm8_postindex
const arg_mem_R_pm_imm8at0_offset
const arg_option
const arg_registers
const arg_registers1
const arg_registers2
const arg_satimm4
const arg_satimm4m1
const arg_satimm5
const arg_satimm5m1
const arg_widthm1
var decoderCover []bool
var errMode = *ast.CallExpr
var errShort = *ast.CallExpr
var errUnknown = *ast.CallExpr
var fpInst []goFPInfo = []goFPInfo{...}
var instFormats = [...]instFormat{...}
var opstr = [...]string{...}
assembler syntax for the various shifts. @x> is a lie; the assembler uses @> 0 instead of @x> 1, but i wanted to be clear that it was a different operation (rotate right extended, not rotate right).
var plan9Shift = []string{...}
var saveDot = *ast.CallExpr
var shiftName = [...]string{...}
An AddrMode is an ARM addressing mode.
type AddrMode uint8
An Args holds the instruction arguments. If an instruction has fewer than 4 arguments, the final elements in the array are nil.
type Args [4]Arg
An Endian is the argument to the SETEND instruction.
type Endian uint8
type Float32Imm float32
type Float64Imm float32
An Imm is an integer constant.
type Imm uint32
A Label is a text (code) address.
type Label uint32
A Mode is an instruction execution mode.
type Mode int
An Op is an ARM opcode.
type Op uint16
A PCRel describes a memory address (usually a code label) as a distance relative to the program counter. TODO(rsc): Define which program counter (PC+4? PC+8? PC?).
type PCRel int32
A Reg is a single register. The zero value denotes R0, not the absence of a register.
type Reg uint8
A RegList is a register list. Bits at indexes x = 0 through 15 indicate whether the corresponding Rx register is in the list.
type RegList uint16
A Shift describes an ARM shift operation.
type Shift uint8
An instArg describes the encoding of a single argument. In the names used for arguments, _p_ means +, _m_ means -, _pm_ means ± (usually keyed by the U bit). The _W suffix indicates a general addressing mode based on the P and W bits. The _offset and _postindex suffixes force the given addressing mode. The rest should be somewhat self-explanatory, at least given the decodeArg function.
type instArg uint8
type instArgs [4]instArg
An Arg is a single instruction argument, one of these types: Endian, Imm, Mem, PCRel, Reg, RegList, RegShift, RegShiftReg.
type Arg interface {
IsArg()
String() string
}
An ImmAlt is an alternate encoding of an integer constant.
type ImmAlt struct {
Val uint8
Rot uint8
}
An Inst is a single instruction.
type Inst struct {
Op Op
Enc uint32
Len int
Args Args
}
A Mem is a memory reference made up of a base R and index expression X. The effective memory address is R or R+X depending on AddrMode. The index expression is X = Sign*(Index Shift Count) + Offset, but in any instruction either Sign = 0 or Offset = 0.
type Mem struct {
Base Reg
Mode AddrMode
Sign int8
Index Reg
Shift Shift
Count uint8
Offset int16
}
A RegShift is a register shifted by a constant.
type RegShift struct {
Reg Reg
Shift Shift
Count uint8
}
A RegShiftReg is a register shifted by a register.
type RegShiftReg struct {
Reg Reg
Shift Shift
RegCount Reg
}
A RegX represents a fraction of a multi-value register. The Index field specifies the index number, but the size of the fraction is not specified. It must be inferred from the instruction and the register type. For example, in a VMOV instruction, RegX{D5, 1} represents the top 32 bits of the 64-bit D5 register.
type RegX struct {
Reg Reg
Index int
}
type goFPInfo struct {
op Op
transArgs []int
gnuName string
goName string
}
An instFormat describes the format of an instruction encoding. An instruction with 32-bit value x matches the format if x&mask == value and the condition matches. The condition matches if x>>28 == 0xF && value>>28==0xF or if x>>28 != 0xF and value>>28 == 0. If x matches the format, then the rest of the fields describe how to interpret x. The opBits describe bits that should be extracted from x and added to the opcode. For example opBits = 0x1234 means that the value (2 bits at offset 1) followed by (4 bits at offset 3) should be added to op. Finally the args describe how to decode the instruction arguments. args is stored as a fixed-size array; if there are fewer than len(args) arguments, args[i] == 0 marks the end of the argument list.
type instFormat struct {
mask uint32
value uint32
priority int8
op Op
opBits uint64
args instArgs
}
Decode decodes the leading bytes in src as a single instruction.
func Decode(src []byte, mode Mode) (inst Inst, err error)
GNUSyntax returns the GNU assembler syntax for the instruction, as defined by GNU binutils. This form typically matches the syntax defined in the ARM Reference Manual.
func GNUSyntax(inst Inst) string
GoSyntax returns the Go assembler syntax for the instruction. The syntax was originally defined by Plan 9. The pc is the program counter of the instruction, used for expanding PC-relative addresses into absolute ones. The symname function queries the symbol table for the program being disassembled. Given a target address it returns the name and base address of the symbol containing the target, if any; otherwise it returns "", 0. The reader r should read from the text segment using text addresses as offsets; it is used to display pc-relative loads as constant loads.
func GoSyntax(inst Inst, pc uint64, symname func(uint64) (string, uint64), text io.ReaderAt) string
func (i ImmAlt) Imm() Imm
func (RegShiftReg) IsArg()
func (Label) IsArg()
func (Mem) IsArg()
func (RegShift) IsArg()
func (Float32Imm) IsArg()
func (Endian) IsArg()
func (Float64Imm) IsArg()
func (RegList) IsArg()
func (Imm) IsArg()
func (PCRel) IsArg()
func (ImmAlt) IsArg()
func (RegX) IsArg()
func (Reg) IsArg()
func (m Mode) String() string
func (i Inst) String() string
func (i ImmAlt) String() string
func (m Mem) String() string
func (r Reg) String() string
func (i Imm) String() string
func (f Float64Imm) String() string
func (r RegList) String() string
func (f Float32Imm) String() string
func (e Endian) String() string
func (s Shift) String() string
func (i Label) String() string
func (r RegShift) String() string
func (op Op) String() string
func (r RegShiftReg) String() string
func (r RegX) String() string
func (r PCRel) String() string
decodeArg decodes the arg described by aop from the instruction bits x. It returns nil if x cannot be decoded according to aop.
func decodeArg(aop instArg, x uint32) Arg
decodeShift decodes the shift-by-immediate encoded in x.
func decodeShift(x uint32) (Shift, uint8)
convert FP instructions from GNU syntax to Plan 9 syntax, for example, vadd.f32 s0, s3, s4 -> ADDF F0, S3, F2 vsub.f64 d0, d2, d4 -> SUBD F0, F2, F4 vldr s2, [r11] -> MOVF (R11), F1 inputs: instruction name and arguments in GNU syntax return values: corresponding instruction name and arguments in Plan 9 syntax
func fpTrans(inst *Inst, op string, args []string) (string, []string)
func gnuArg(inst *Inst, argIndex int, arg Arg) string
convert memory operand from GNU syntax to Plan 9 syntax, for example, [r5] -> (R5) [r6, #4080] -> 0xff0(R6) [r2, r0, ror #1] -> (R2)(R0@>1) inst [r2, -r0, ror #1] -> INST.U (R2)(R0@>1) input: a memory operand return values: corresponding memory operand in Plan 9 syntax .W/.P/.U suffix
func memOpTrans(mem Mem) (string, string)
func plan9Arg(inst *Inst, pc uint64, symname func(uint64) (string, uint64), arg Arg) string
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