riscv64asm

Imports

Imports #

"fmt"
"strings"
"fmt"
"io"
"strconv"
"strings"
"strconv"
"encoding/binary"
"errors"
"strings"

Constants & Variables

ADD const #

const ADD

ADDI const #

const ADDI

ADDIW const #

const ADDIW

ADDW const #

const ADDW

ADD_UW const #

const ADD_UW

AMOADD_D const #

const AMOADD_D

AMOADD_D_AQ const #

const AMOADD_D_AQ

AMOADD_D_AQRL const #

const AMOADD_D_AQRL

AMOADD_D_RL const #

const AMOADD_D_RL

AMOADD_W const #

const AMOADD_W

AMOADD_W_AQ const #

const AMOADD_W_AQ

AMOADD_W_AQRL const #

const AMOADD_W_AQRL

AMOADD_W_RL const #

const AMOADD_W_RL

AMOAND_D const #

const AMOAND_D

AMOAND_D_AQ const #

const AMOAND_D_AQ

AMOAND_D_AQRL const #

const AMOAND_D_AQRL

AMOAND_D_RL const #

const AMOAND_D_RL

AMOAND_W const #

const AMOAND_W

AMOAND_W_AQ const #

const AMOAND_W_AQ

AMOAND_W_AQRL const #

const AMOAND_W_AQRL

AMOAND_W_RL const #

const AMOAND_W_RL

AMOMAXU_D const #

const AMOMAXU_D

AMOMAXU_D_AQ const #

const AMOMAXU_D_AQ

AMOMAXU_D_AQRL const #

const AMOMAXU_D_AQRL

AMOMAXU_D_RL const #

const AMOMAXU_D_RL

AMOMAXU_W const #

const AMOMAXU_W

AMOMAXU_W_AQ const #

const AMOMAXU_W_AQ

AMOMAXU_W_AQRL const #

const AMOMAXU_W_AQRL

AMOMAXU_W_RL const #

const AMOMAXU_W_RL

AMOMAX_D const #

const AMOMAX_D

AMOMAX_D_AQ const #

const AMOMAX_D_AQ

AMOMAX_D_AQRL const #

const AMOMAX_D_AQRL

AMOMAX_D_RL const #

const AMOMAX_D_RL

AMOMAX_W const #

const AMOMAX_W

AMOMAX_W_AQ const #

const AMOMAX_W_AQ

AMOMAX_W_AQRL const #

const AMOMAX_W_AQRL

AMOMAX_W_RL const #

const AMOMAX_W_RL

AMOMINU_D const #

const AMOMINU_D

AMOMINU_D_AQ const #

const AMOMINU_D_AQ

AMOMINU_D_AQRL const #

const AMOMINU_D_AQRL

AMOMINU_D_RL const #

const AMOMINU_D_RL

AMOMINU_W const #

const AMOMINU_W

AMOMINU_W_AQ const #

const AMOMINU_W_AQ

AMOMINU_W_AQRL const #

const AMOMINU_W_AQRL

AMOMINU_W_RL const #

const AMOMINU_W_RL

AMOMIN_D const #

const AMOMIN_D

AMOMIN_D_AQ const #

const AMOMIN_D_AQ

AMOMIN_D_AQRL const #

const AMOMIN_D_AQRL

AMOMIN_D_RL const #

const AMOMIN_D_RL

AMOMIN_W const #

const AMOMIN_W

AMOMIN_W_AQ const #

const AMOMIN_W_AQ

AMOMIN_W_AQRL const #

const AMOMIN_W_AQRL

AMOMIN_W_RL const #

const AMOMIN_W_RL

AMOOR_D const #

const AMOOR_D

AMOOR_D_AQ const #

const AMOOR_D_AQ

AMOOR_D_AQRL const #

const AMOOR_D_AQRL

AMOOR_D_RL const #

const AMOOR_D_RL

AMOOR_W const #

const AMOOR_W

AMOOR_W_AQ const #

const AMOOR_W_AQ

AMOOR_W_AQRL const #

const AMOOR_W_AQRL

AMOOR_W_RL const #

const AMOOR_W_RL

AMOSWAP_D const #

const AMOSWAP_D

AMOSWAP_D_AQ const #

const AMOSWAP_D_AQ

AMOSWAP_D_AQRL const #

const AMOSWAP_D_AQRL

AMOSWAP_D_RL const #

const AMOSWAP_D_RL

AMOSWAP_W const #

const AMOSWAP_W

AMOSWAP_W_AQ const #

const AMOSWAP_W_AQ

AMOSWAP_W_AQRL const #

const AMOSWAP_W_AQRL

AMOSWAP_W_RL const #

const AMOSWAP_W_RL

AMOXOR_D const #

const AMOXOR_D

AMOXOR_D_AQ const #

const AMOXOR_D_AQ

AMOXOR_D_AQRL const #

const AMOXOR_D_AQRL

AMOXOR_D_RL const #

const AMOXOR_D_RL

AMOXOR_W const #

const AMOXOR_W

AMOXOR_W_AQ const #

const AMOXOR_W_AQ

AMOXOR_W_AQRL const #

const AMOXOR_W_AQRL

AMOXOR_W_RL const #

const AMOXOR_W_RL

AND const #

const AND

ANDI const #

const ANDI

ANDN const #

const ANDN

AUIPC const #

const AUIPC

BCLR const #

const BCLR

BCLRI const #

const BCLRI

BEQ const #

const BEQ

BEXT const #

const BEXT

BEXTI const #

const BEXTI

BGE const #

const BGE

BGEU const #

const BGEU

BINV const #

const BINV

BINVI const #

const BINVI

BLT const #

const BLT

BLTU const #

const BLTU

BNE const #

const BNE

BSET const #

const BSET

BSETI const #

const BSETI

CLZ const #

const CLZ

CLZW const #

const CLZW

CPOP const #

const CPOP

CPOPW const #

const CPOPW

CSRRC const #

const CSRRC

CSRRCI const #

const CSRRCI

CSRRS const #

const CSRRS

CSRRSI const #

const CSRRSI

CSRRW const #

const CSRRW

CSRRWI const #

const CSRRWI

CTZ const #

const CTZ

CTZW const #

const CTZW

CYCLE const #

const CYCLE CSR = 0x0c00

CYCLEH const #

const CYCLEH CSR = 0x0c80

C_ADD const #

const C_ADD

C_ADDI const #

const C_ADDI

C_ADDI16SP const #

const C_ADDI16SP

C_ADDI4SPN const #

const C_ADDI4SPN

C_ADDIW const #

const C_ADDIW

C_ADDW const #

const C_ADDW

C_AND const #

const C_AND

C_ANDI const #

const C_ANDI

C_BEQZ const #

const C_BEQZ

C_BNEZ const #

const C_BNEZ

C_EBREAK const #

const C_EBREAK

C_FLD const #

const C_FLD

C_FLDSP const #

const C_FLDSP

C_FSD const #

const C_FSD

C_FSDSP const #

const C_FSDSP

C_J const #

const C_J

C_JALR const #

const C_JALR

C_JR const #

const C_JR

C_LD const #

const C_LD

C_LDSP const #

const C_LDSP

C_LI const #

const C_LI

C_LUI const #

const C_LUI

C_LW const #

const C_LW

C_LWSP const #

const C_LWSP

C_MV const #

const C_MV

C_NOP const #

const C_NOP

C_OR const #

const C_OR

C_SD const #

const C_SD

C_SDSP const #

const C_SDSP

C_SLLI const #

const C_SLLI

C_SRAI const #

const C_SRAI

C_SRLI const #

const C_SRLI

C_SUB const #

const C_SUB

C_SUBW const #

const C_SUBW

C_SW const #

const C_SW

C_SWSP const #

const C_SWSP

C_UNIMP const #

const C_UNIMP

C_XOR const #

const C_XOR

DCSR const #

const DCSR CSR = 0x07b0

DIV const #

const DIV

DIVU const #

const DIVU

DIVUW const #

const DIVUW

DIVW const #

const DIVW

DPC const #

const DPC CSR = 0x07b1

DSCRATCH0 const #

const DSCRATCH0 CSR = 0x07b2

DSCRATCH1 const #

const DSCRATCH1 CSR = 0x07b3

EBREAK const #

const EBREAK

ECALL const #

const ECALL

F0 const #

Float point register

const F0

F1 const #

const F1

F10 const #

const F10

F11 const #

const F11

F12 const #

const F12

F13 const #

const F13

F14 const #

const F14

F15 const #

const F15

F16 const #

const F16

F17 const #

const F17

F18 const #

const F18

F19 const #

const F19

F2 const #

const F2

F20 const #

const F20

F21 const #

const F21

F22 const #

const F22

F23 const #

const F23

F24 const #

const F24

F25 const #

const F25

F26 const #

const F26

F27 const #

const F27

F28 const #

const F28

F29 const #

const F29

F3 const #

const F3

F30 const #

const F30

F31 const #

const F31

F4 const #

const F4

F5 const #

const F5

F6 const #

const F6

F7 const #

const F7

F8 const #

const F8

F9 const #

const F9

FADD_D const #

const FADD_D

FADD_H const #

const FADD_H

FADD_Q const #

const FADD_Q

FADD_S const #

const FADD_S

FCLASS_D const #

const FCLASS_D

FCLASS_H const #

const FCLASS_H

FCLASS_Q const #

const FCLASS_Q

FCLASS_S const #

const FCLASS_S

FCSR const #

const FCSR CSR = 0x0003

FCVT_D_L const #

const FCVT_D_L

FCVT_D_LU const #

const FCVT_D_LU

FCVT_D_Q const #

const FCVT_D_Q

FCVT_D_S const #

const FCVT_D_S

FCVT_D_W const #

const FCVT_D_W

FCVT_D_WU const #

const FCVT_D_WU

FCVT_H_L const #

const FCVT_H_L

FCVT_H_LU const #

const FCVT_H_LU

FCVT_H_S const #

const FCVT_H_S

FCVT_H_W const #

const FCVT_H_W

FCVT_H_WU const #

const FCVT_H_WU

FCVT_LU_D const #

const FCVT_LU_D

FCVT_LU_H const #

const FCVT_LU_H

FCVT_LU_Q const #

const FCVT_LU_Q

FCVT_LU_S const #

const FCVT_LU_S

FCVT_L_D const #

const FCVT_L_D

FCVT_L_H const #

const FCVT_L_H

FCVT_L_Q const #

const FCVT_L_Q

FCVT_L_S const #

const FCVT_L_S

FCVT_Q_D const #

const FCVT_Q_D

FCVT_Q_L const #

const FCVT_Q_L

FCVT_Q_LU const #

const FCVT_Q_LU

FCVT_Q_S const #

const FCVT_Q_S

FCVT_Q_W const #

const FCVT_Q_W

FCVT_Q_WU const #

const FCVT_Q_WU

FCVT_S_D const #

const FCVT_S_D

FCVT_S_H const #

const FCVT_S_H

FCVT_S_L const #

const FCVT_S_L

FCVT_S_LU const #

const FCVT_S_LU

FCVT_S_Q const #

const FCVT_S_Q

FCVT_S_W const #

const FCVT_S_W

FCVT_S_WU const #

const FCVT_S_WU

FCVT_WU_D const #

const FCVT_WU_D

FCVT_WU_H const #

const FCVT_WU_H

FCVT_WU_Q const #

const FCVT_WU_Q

FCVT_WU_S const #

const FCVT_WU_S

FCVT_W_D const #

const FCVT_W_D

FCVT_W_H const #

const FCVT_W_H

FCVT_W_Q const #

const FCVT_W_Q

FCVT_W_S const #

const FCVT_W_S

FDIV_D const #

const FDIV_D

FDIV_H const #

const FDIV_H

FDIV_Q const #

const FDIV_Q

FDIV_S const #

const FDIV_S

FENCE const #

const FENCE

FENCE_I const #

const FENCE_I

FEQ_D const #

const FEQ_D

FEQ_H const #

const FEQ_H

FEQ_Q const #

const FEQ_Q

FEQ_S const #

const FEQ_S

FFLAGS const #

const FFLAGS CSR = 0x0001

FLD const #

const FLD

FLE_D const #

const FLE_D

FLE_H const #

const FLE_H

FLE_Q const #

const FLE_Q

FLE_S const #

const FLE_S

FLH const #

const FLH

FLQ const #

const FLQ

FLT_D const #

const FLT_D

FLT_H const #

const FLT_H

FLT_Q const #

const FLT_Q

FLT_S const #

const FLT_S

FLW const #

const FLW

FMADD_D const #

const FMADD_D

FMADD_H const #

const FMADD_H

FMADD_Q const #

const FMADD_Q

FMADD_S const #

const FMADD_S

FMAX_D const #

const FMAX_D

FMAX_H const #

const FMAX_H

FMAX_Q const #

const FMAX_Q

FMAX_S const #

const FMAX_S

FMIN_D const #

const FMIN_D

FMIN_H const #

const FMIN_H

FMIN_Q const #

const FMIN_Q

FMIN_S const #

const FMIN_S

FMSUB_D const #

const FMSUB_D

FMSUB_H const #

const FMSUB_H

FMSUB_Q const #

const FMSUB_Q

FMSUB_S const #

const FMSUB_S

FMUL_D const #

const FMUL_D

FMUL_H const #

const FMUL_H

FMUL_Q const #

const FMUL_Q

FMUL_S const #

const FMUL_S

FMV_D_X const #

const FMV_D_X

FMV_H_X const #

const FMV_H_X

FMV_W_X const #

const FMV_W_X

FMV_X_D const #

const FMV_X_D

FMV_X_H const #

const FMV_X_H

FMV_X_W const #

const FMV_X_W

FNMADD_D const #

const FNMADD_D

FNMADD_H const #

const FNMADD_H

FNMADD_Q const #

const FNMADD_Q

FNMADD_S const #

const FNMADD_S

FNMSUB_D const #

const FNMSUB_D

FNMSUB_H const #

const FNMSUB_H

FNMSUB_Q const #

const FNMSUB_Q

FNMSUB_S const #

const FNMSUB_S

FRM const #

const FRM CSR = 0x0002

FSD const #

const FSD

FSGNJN_D const #

const FSGNJN_D

FSGNJN_H const #

const FSGNJN_H

FSGNJN_Q const #

const FSGNJN_Q

FSGNJN_S const #

const FSGNJN_S

FSGNJX_D const #

const FSGNJX_D

FSGNJX_H const #

const FSGNJX_H

FSGNJX_Q const #

const FSGNJX_Q

FSGNJX_S const #

const FSGNJX_S

FSGNJ_D const #

const FSGNJ_D

FSGNJ_H const #

const FSGNJ_H

FSGNJ_Q const #

const FSGNJ_Q

FSGNJ_S const #

const FSGNJ_S

FSH const #

const FSH

FSQ const #

const FSQ

FSQRT_D const #

const FSQRT_D

FSQRT_H const #

const FSQRT_H

FSQRT_Q const #

const FSQRT_Q

FSQRT_S const #

const FSQRT_S

FSUB_D const #

const FSUB_D

FSUB_H const #

const FSUB_H

FSUB_Q const #

const FSUB_Q

FSUB_S const #

const FSUB_S

FSW const #

const FSW

HCOUNTEREN const #

const HCOUNTEREN CSR = 0x0606

HEDELEG const #

const HEDELEG CSR = 0x0602

HGATP const #

const HGATP CSR = 0x0680

HGEIE const #

const HGEIE CSR = 0x0607

HGEIP const #

const HGEIP CSR = 0x0e12

HIDELEG const #

const HIDELEG CSR = 0x0603

HIE const #

const HIE CSR = 0x0604

HIP const #

const HIP CSR = 0x0644

HPMCOUNTER10 const #

const HPMCOUNTER10 CSR = 0x0c0a

HPMCOUNTER10H const #

const HPMCOUNTER10H CSR = 0x0c8a

HPMCOUNTER11 const #

const HPMCOUNTER11 CSR = 0x0c0b

HPMCOUNTER11H const #

const HPMCOUNTER11H CSR = 0x0c8b

HPMCOUNTER12 const #

const HPMCOUNTER12 CSR = 0x0c0c

HPMCOUNTER12H const #

const HPMCOUNTER12H CSR = 0x0c8c

HPMCOUNTER13 const #

const HPMCOUNTER13 CSR = 0x0c0d

HPMCOUNTER13H const #

const HPMCOUNTER13H CSR = 0x0c8d

HPMCOUNTER14 const #

const HPMCOUNTER14 CSR = 0x0c0e

HPMCOUNTER14H const #

const HPMCOUNTER14H CSR = 0x0c8e

HPMCOUNTER15 const #

const HPMCOUNTER15 CSR = 0x0c0f

HPMCOUNTER15H const #

const HPMCOUNTER15H CSR = 0x0c8f

HPMCOUNTER16 const #

const HPMCOUNTER16 CSR = 0x0c10

HPMCOUNTER16H const #

const HPMCOUNTER16H CSR = 0x0c90

HPMCOUNTER17 const #

const HPMCOUNTER17 CSR = 0x0c11

HPMCOUNTER17H const #

const HPMCOUNTER17H CSR = 0x0c91

HPMCOUNTER18 const #

const HPMCOUNTER18 CSR = 0x0c12

HPMCOUNTER18H const #

const HPMCOUNTER18H CSR = 0x0c92

HPMCOUNTER19 const #

const HPMCOUNTER19 CSR = 0x0c13

HPMCOUNTER19H const #

const HPMCOUNTER19H CSR = 0x0c93

HPMCOUNTER20 const #

const HPMCOUNTER20 CSR = 0x0c14

HPMCOUNTER20H const #

const HPMCOUNTER20H CSR = 0x0c94

HPMCOUNTER21 const #

const HPMCOUNTER21 CSR = 0x0c15

HPMCOUNTER21H const #

const HPMCOUNTER21H CSR = 0x0c95

HPMCOUNTER22 const #

const HPMCOUNTER22 CSR = 0x0c16

HPMCOUNTER22H const #

const HPMCOUNTER22H CSR = 0x0c96

HPMCOUNTER23 const #

const HPMCOUNTER23 CSR = 0x0c17

HPMCOUNTER23H const #

const HPMCOUNTER23H CSR = 0x0c97

HPMCOUNTER24 const #

const HPMCOUNTER24 CSR = 0x0c18

HPMCOUNTER24H const #

const HPMCOUNTER24H CSR = 0x0c98

HPMCOUNTER25 const #

const HPMCOUNTER25 CSR = 0x0c19

HPMCOUNTER25H const #

const HPMCOUNTER25H CSR = 0x0c99

HPMCOUNTER26 const #

const HPMCOUNTER26 CSR = 0x0c1a

HPMCOUNTER26H const #

const HPMCOUNTER26H CSR = 0x0c9a

HPMCOUNTER27 const #

const HPMCOUNTER27 CSR = 0x0c1b

HPMCOUNTER27H const #

const HPMCOUNTER27H CSR = 0x0c9b

HPMCOUNTER28 const #

const HPMCOUNTER28 CSR = 0x0c1c

HPMCOUNTER28H const #

const HPMCOUNTER28H CSR = 0x0c9c

HPMCOUNTER29 const #

const HPMCOUNTER29 CSR = 0x0c1d

HPMCOUNTER29H const #

const HPMCOUNTER29H CSR = 0x0c9d

HPMCOUNTER3 const #

const HPMCOUNTER3 CSR = 0x0c03

HPMCOUNTER30 const #

const HPMCOUNTER30 CSR = 0x0c1e

HPMCOUNTER30H const #

const HPMCOUNTER30H CSR = 0x0c9e

HPMCOUNTER31 const #

const HPMCOUNTER31 CSR = 0x0c1f

HPMCOUNTER31H const #

const HPMCOUNTER31H CSR = 0x0c9f

HPMCOUNTER3H const #

const HPMCOUNTER3H CSR = 0x0c83

HPMCOUNTER4 const #

const HPMCOUNTER4 CSR = 0x0c04

HPMCOUNTER4H const #

const HPMCOUNTER4H CSR = 0x0c84

HPMCOUNTER5 const #

const HPMCOUNTER5 CSR = 0x0c05

HPMCOUNTER5H const #

const HPMCOUNTER5H CSR = 0x0c85

HPMCOUNTER6 const #

const HPMCOUNTER6 CSR = 0x0c06

HPMCOUNTER6H const #

const HPMCOUNTER6H CSR = 0x0c86

HPMCOUNTER7 const #

const HPMCOUNTER7 CSR = 0x0c07

HPMCOUNTER7H const #

const HPMCOUNTER7H CSR = 0x0c87

HPMCOUNTER8 const #

const HPMCOUNTER8 CSR = 0x0c08

HPMCOUNTER8H const #

const HPMCOUNTER8H CSR = 0x0c88

HPMCOUNTER9 const #

const HPMCOUNTER9 CSR = 0x0c09

HPMCOUNTER9H const #

const HPMCOUNTER9H CSR = 0x0c89

HSTATUS const #

const HSTATUS CSR = 0x0600

HTIMEDELTA const #

const HTIMEDELTA CSR = 0x0605

HTIMEDELTAH const #

const HTIMEDELTAH CSR = 0x0615

HTINST const #

const HTINST CSR = 0x064a

HTVAL const #

const HTVAL CSR = 0x0643

HVIP const #

const HVIP CSR = 0x0645

INSTRET const #

const INSTRET CSR = 0x0c02

INSTRETH const #

const INSTRETH CSR = 0x0c82

JAL const #

const JAL

JALR const #

const JALR

LB const #

const LB

LBU const #

const LBU

LD const #

const LD

LH const #

const LH

LHU const #

const LHU

LR_D const #

const LR_D

LR_D_AQ const #

const LR_D_AQ

LR_D_AQRL const #

const LR_D_AQRL

LR_D_RL const #

const LR_D_RL

LR_W const #

const LR_W

LR_W_AQ const #

const LR_W_AQ

LR_W_AQRL const #

const LR_W_AQRL

LR_W_RL const #

const LR_W_RL

LUI const #

const LUI

LW const #

const LW

LWU const #

const LWU

MARCHID const #

const MARCHID CSR = 0x0f12

MAX const #

const MAX

MAXU const #

const MAXU

MCAUSE const #

const MCAUSE CSR = 0x0342

MCONTEXT const #

const MCONTEXT CSR = 0x07a8

MCOUNTEREN const #

const MCOUNTEREN CSR = 0x0306

MCOUNTINHIBIT const #

const MCOUNTINHIBIT CSR = 0x0320

MCYCLE const #

const MCYCLE CSR = 0x0b00

MCYCLEH const #

const MCYCLEH CSR = 0x0b80

MEDELEG const #

const MEDELEG CSR = 0x0302

MENTROPY const #

const MENTROPY CSR = 0x0f15

MEPC const #

const MEPC CSR = 0x0341

MHARTID const #

const MHARTID CSR = 0x0f14

MHPMCOUNTER10 const #

const MHPMCOUNTER10 CSR = 0x0b0a

MHPMCOUNTER10H const #

const MHPMCOUNTER10H CSR = 0x0b8a

MHPMCOUNTER11 const #

const MHPMCOUNTER11 CSR = 0x0b0b

MHPMCOUNTER11H const #

const MHPMCOUNTER11H CSR = 0x0b8b

MHPMCOUNTER12 const #

const MHPMCOUNTER12 CSR = 0x0b0c

MHPMCOUNTER12H const #

const MHPMCOUNTER12H CSR = 0x0b8c

MHPMCOUNTER13 const #

const MHPMCOUNTER13 CSR = 0x0b0d

MHPMCOUNTER13H const #

const MHPMCOUNTER13H CSR = 0x0b8d

MHPMCOUNTER14 const #

const MHPMCOUNTER14 CSR = 0x0b0e

MHPMCOUNTER14H const #

const MHPMCOUNTER14H CSR = 0x0b8e

MHPMCOUNTER15 const #

const MHPMCOUNTER15 CSR = 0x0b0f

MHPMCOUNTER15H const #

const MHPMCOUNTER15H CSR = 0x0b8f

MHPMCOUNTER16 const #

const MHPMCOUNTER16 CSR = 0x0b10

MHPMCOUNTER16H const #

const MHPMCOUNTER16H CSR = 0x0b90

MHPMCOUNTER17 const #

const MHPMCOUNTER17 CSR = 0x0b11

MHPMCOUNTER17H const #

const MHPMCOUNTER17H CSR = 0x0b91

MHPMCOUNTER18 const #

const MHPMCOUNTER18 CSR = 0x0b12

MHPMCOUNTER18H const #

const MHPMCOUNTER18H CSR = 0x0b92

MHPMCOUNTER19 const #

const MHPMCOUNTER19 CSR = 0x0b13

MHPMCOUNTER19H const #

const MHPMCOUNTER19H CSR = 0x0b93

MHPMCOUNTER20 const #

const MHPMCOUNTER20 CSR = 0x0b14

MHPMCOUNTER20H const #

const MHPMCOUNTER20H CSR = 0x0b94

MHPMCOUNTER21 const #

const MHPMCOUNTER21 CSR = 0x0b15

MHPMCOUNTER21H const #

const MHPMCOUNTER21H CSR = 0x0b95

MHPMCOUNTER22 const #

const MHPMCOUNTER22 CSR = 0x0b16

MHPMCOUNTER22H const #

const MHPMCOUNTER22H CSR = 0x0b96

MHPMCOUNTER23 const #

const MHPMCOUNTER23 CSR = 0x0b17

MHPMCOUNTER23H const #

const MHPMCOUNTER23H CSR = 0x0b97

MHPMCOUNTER24 const #

const MHPMCOUNTER24 CSR = 0x0b18

MHPMCOUNTER24H const #

const MHPMCOUNTER24H CSR = 0x0b98

MHPMCOUNTER25 const #

const MHPMCOUNTER25 CSR = 0x0b19

MHPMCOUNTER25H const #

const MHPMCOUNTER25H CSR = 0x0b99

MHPMCOUNTER26 const #

const MHPMCOUNTER26 CSR = 0x0b1a

MHPMCOUNTER26H const #

const MHPMCOUNTER26H CSR = 0x0b9a

MHPMCOUNTER27 const #

const MHPMCOUNTER27 CSR = 0x0b1b

MHPMCOUNTER27H const #

const MHPMCOUNTER27H CSR = 0x0b9b

MHPMCOUNTER28 const #

const MHPMCOUNTER28 CSR = 0x0b1c

MHPMCOUNTER28H const #

const MHPMCOUNTER28H CSR = 0x0b9c

MHPMCOUNTER29 const #

const MHPMCOUNTER29 CSR = 0x0b1d

MHPMCOUNTER29H const #

const MHPMCOUNTER29H CSR = 0x0b9d

MHPMCOUNTER3 const #

const MHPMCOUNTER3 CSR = 0x0b03

MHPMCOUNTER30 const #

const MHPMCOUNTER30 CSR = 0x0b1e

MHPMCOUNTER30H const #

const MHPMCOUNTER30H CSR = 0x0b9e

MHPMCOUNTER31 const #

const MHPMCOUNTER31 CSR = 0x0b1f

MHPMCOUNTER31H const #

const MHPMCOUNTER31H CSR = 0x0b9f

MHPMCOUNTER3H const #

const MHPMCOUNTER3H CSR = 0x0b83

MHPMCOUNTER4 const #

const MHPMCOUNTER4 CSR = 0x0b04

MHPMCOUNTER4H const #

const MHPMCOUNTER4H CSR = 0x0b84

MHPMCOUNTER5 const #

const MHPMCOUNTER5 CSR = 0x0b05

MHPMCOUNTER5H const #

const MHPMCOUNTER5H CSR = 0x0b85

MHPMCOUNTER6 const #

const MHPMCOUNTER6 CSR = 0x0b06

MHPMCOUNTER6H const #

const MHPMCOUNTER6H CSR = 0x0b86

MHPMCOUNTER7 const #

const MHPMCOUNTER7 CSR = 0x0b07

MHPMCOUNTER7H const #

const MHPMCOUNTER7H CSR = 0x0b87

MHPMCOUNTER8 const #

const MHPMCOUNTER8 CSR = 0x0b08

MHPMCOUNTER8H const #

const MHPMCOUNTER8H CSR = 0x0b88

MHPMCOUNTER9 const #

const MHPMCOUNTER9 CSR = 0x0b09

MHPMCOUNTER9H const #

const MHPMCOUNTER9H CSR = 0x0b89

MHPMEVENT10 const #

const MHPMEVENT10 CSR = 0x032a

MHPMEVENT11 const #

const MHPMEVENT11 CSR = 0x032b

MHPMEVENT12 const #

const MHPMEVENT12 CSR = 0x032c

MHPMEVENT13 const #

const MHPMEVENT13 CSR = 0x032d

MHPMEVENT14 const #

const MHPMEVENT14 CSR = 0x032e

MHPMEVENT15 const #

const MHPMEVENT15 CSR = 0x032f

MHPMEVENT16 const #

const MHPMEVENT16 CSR = 0x0330

MHPMEVENT17 const #

const MHPMEVENT17 CSR = 0x0331

MHPMEVENT18 const #

const MHPMEVENT18 CSR = 0x0332

MHPMEVENT19 const #

const MHPMEVENT19 CSR = 0x0333

MHPMEVENT20 const #

const MHPMEVENT20 CSR = 0x0334

MHPMEVENT21 const #

const MHPMEVENT21 CSR = 0x0335

MHPMEVENT22 const #

const MHPMEVENT22 CSR = 0x0336

MHPMEVENT23 const #

const MHPMEVENT23 CSR = 0x0337

MHPMEVENT24 const #

const MHPMEVENT24 CSR = 0x0338

MHPMEVENT25 const #

const MHPMEVENT25 CSR = 0x0339

MHPMEVENT26 const #

const MHPMEVENT26 CSR = 0x033a

MHPMEVENT27 const #

const MHPMEVENT27 CSR = 0x033b

MHPMEVENT28 const #

const MHPMEVENT28 CSR = 0x033c

MHPMEVENT29 const #

const MHPMEVENT29 CSR = 0x033d

MHPMEVENT3 const #

const MHPMEVENT3 CSR = 0x0323

MHPMEVENT30 const #

const MHPMEVENT30 CSR = 0x033e

MHPMEVENT31 const #

const MHPMEVENT31 CSR = 0x033f

MHPMEVENT4 const #

const MHPMEVENT4 CSR = 0x0324

MHPMEVENT5 const #

const MHPMEVENT5 CSR = 0x0325

MHPMEVENT6 const #

const MHPMEVENT6 CSR = 0x0326

MHPMEVENT7 const #

const MHPMEVENT7 CSR = 0x0327

MHPMEVENT8 const #

const MHPMEVENT8 CSR = 0x0328

MHPMEVENT9 const #

const MHPMEVENT9 CSR = 0x0329

MIDELEG const #

const MIDELEG CSR = 0x0303

MIE const #

const MIE CSR = 0x0304

MIMPID const #

const MIMPID CSR = 0x0f13

MIN const #

const MIN

MINSTRET const #

const MINSTRET CSR = 0x0b02

MINSTRETH const #

const MINSTRETH CSR = 0x0b82

MINTSTATUS const #

const MINTSTATUS CSR = 0x0346

MINU const #

const MINU

MIP const #

const MIP CSR = 0x0344

MISA const #

const MISA CSR = 0x0301

MNOISE const #

const MNOISE CSR = 0x07a9

MNXTI const #

const MNXTI CSR = 0x0345

MSCRATCH const #

const MSCRATCH CSR = 0x0340

MSCRATCHCSW const #

const MSCRATCHCSW CSR = 0x0348

MSCRATCHCSWL const #

const MSCRATCHCSWL CSR = 0x0349

MSTATUS const #

const MSTATUS CSR = 0x0300

MSTATUSH const #

const MSTATUSH CSR = 0x0310

MTINST const #

const MTINST CSR = 0x034a

MTVAL const #

const MTVAL CSR = 0x0343

MTVAL2 const #

const MTVAL2 CSR = 0x034b

MTVEC const #

const MTVEC CSR = 0x0305

MTVT const #

const MTVT CSR = 0x0307

MUL const #

const MUL

MULH const #

const MULH

MULHSU const #

const MULHSU

MULHU const #

const MULHU

MULW const #

const MULW

MVENDORID const #

const MVENDORID CSR = 0x0f11

OR const #

const OR

ORC_B const #

const ORC_B

ORI const #

const ORI

ORN const #

const ORN

PMPADDR0 const #

const PMPADDR0 CSR = 0x03b0

PMPADDR1 const #

const PMPADDR1 CSR = 0x03b1

PMPADDR10 const #

const PMPADDR10 CSR = 0x03ba

PMPADDR11 const #

const PMPADDR11 CSR = 0x03bb

PMPADDR12 const #

const PMPADDR12 CSR = 0x03bc

PMPADDR13 const #

const PMPADDR13 CSR = 0x03bd

PMPADDR14 const #

const PMPADDR14 CSR = 0x03be

PMPADDR15 const #

const PMPADDR15 CSR = 0x03bf

PMPADDR2 const #

const PMPADDR2 CSR = 0x03b2

PMPADDR3 const #

const PMPADDR3 CSR = 0x03b3

PMPADDR4 const #

const PMPADDR4 CSR = 0x03b4

PMPADDR5 const #

const PMPADDR5 CSR = 0x03b5

PMPADDR6 const #

const PMPADDR6 CSR = 0x03b6

PMPADDR7 const #

const PMPADDR7 CSR = 0x03b7

PMPADDR8 const #

const PMPADDR8 CSR = 0x03b8

PMPADDR9 const #

const PMPADDR9 CSR = 0x03b9

PMPCFG0 const #

const PMPCFG0 CSR = 0x03a0

PMPCFG1 const #

const PMPCFG1 CSR = 0x03a1

PMPCFG2 const #

const PMPCFG2 CSR = 0x03a2

PMPCFG3 const #

const PMPCFG3 CSR = 0x03a3

REM const #

const REM

REMU const #

const REMU

REMUW const #

const REMUW

REMW const #

const REMW

REV8 const #

const REV8

ROL const #

const ROL

ROLW const #

const ROLW

ROR const #

const ROR

RORI const #

const RORI

RORIW const #

const RORIW

RORW const #

const RORW

SATP const #

const SATP CSR = 0x0180

SB const #

const SB

SCAUSE const #

const SCAUSE CSR = 0x0142

SCONTEXT const #

const SCONTEXT CSR = 0x07aa

SCOUNTEREN const #

const SCOUNTEREN CSR = 0x0106

SC_D const #

const SC_D

SC_D_AQ const #

const SC_D_AQ

SC_D_AQRL const #

const SC_D_AQRL

SC_D_RL const #

const SC_D_RL

SC_W const #

const SC_W

SC_W_AQ const #

const SC_W_AQ

SC_W_AQRL const #

const SC_W_AQRL

SC_W_RL const #

const SC_W_RL

SD const #

const SD

SEDELEG const #

const SEDELEG CSR = 0x0102

SEPC const #

const SEPC CSR = 0x0141

SEXT_B const #

const SEXT_B

SEXT_H const #

const SEXT_H

SH const #

const SH

SH1ADD const #

const SH1ADD

SH1ADD_UW const #

const SH1ADD_UW

SH2ADD const #

const SH2ADD

SH2ADD_UW const #

const SH2ADD_UW

SH3ADD const #

const SH3ADD

SH3ADD_UW const #

const SH3ADD_UW

SIDELEG const #

const SIDELEG CSR = 0x0103

SIE const #

const SIE CSR = 0x0104

SINTSTATUS const #

const SINTSTATUS CSR = 0x0146

SIP const #

const SIP CSR = 0x0144

SLL const #

const SLL

SLLI const #

const SLLI

SLLIW const #

const SLLIW

SLLI_UW const #

const SLLI_UW

SLLW const #

const SLLW

SLT const #

const SLT

SLTI const #

const SLTI

SLTIU const #

const SLTIU

SLTU const #

const SLTU

SNXTI const #

const SNXTI CSR = 0x0145

SRA const #

const SRA

SRAI const #

const SRAI

SRAIW const #

const SRAIW

SRAW const #

const SRAW

SRL const #

const SRL

SRLI const #

const SRLI

SRLIW const #

const SRLIW

SRLW const #

const SRLW

SSCRATCH const #

const SSCRATCH CSR = 0x0140

SSCRATCHCSW const #

const SSCRATCHCSW CSR = 0x0148

SSCRATCHCSWL const #

const SSCRATCHCSWL CSR = 0x0149

SSTATUS const #

const SSTATUS CSR = 0x0100

STVAL const #

const STVAL CSR = 0x0143

STVEC const #

const STVEC CSR = 0x0105

STVT const #

const STVT CSR = 0x0107

SUB const #

const SUB

SUBW const #

const SUBW

SW const #

const SW

TCONTROL const #

const TCONTROL CSR = 0x07a5

TDATA1 const #

const TDATA1 CSR = 0x07a1

TDATA2 const #

const TDATA2 CSR = 0x07a2

TDATA3 const #

const TDATA3 CSR = 0x07a3

TIME const #

const TIME CSR = 0x0c01

TIMEH const #

const TIMEH CSR = 0x0c81

TINFO const #

const TINFO CSR = 0x07a4

TSELECT const #

const TSELECT CSR = 0x07a0

UCAUSE const #

const UCAUSE CSR = 0x0042

UEPC const #

const UEPC CSR = 0x0041

UIE const #

const UIE CSR = 0x0004

UINTSTATUS const #

const UINTSTATUS CSR = 0x0046

UIP const #

const UIP CSR = 0x0044

UNXTI const #

const UNXTI CSR = 0x0045

USCRATCH const #

const USCRATCH CSR = 0x0040

USCRATCHCSW const #

const USCRATCHCSW CSR = 0x0048

USCRATCHCSWL const #

const USCRATCHCSWL CSR = 0x0049

USTATUS const #

Control status register

const USTATUS CSR = 0x0000

UTVAL const #

const UTVAL CSR = 0x0043

UTVEC const #

const UTVEC CSR = 0x0005

UTVT const #

const UTVT CSR = 0x0007

VCSR const #

const VCSR CSR = 0x000f

VL const #

const VL CSR = 0x0c20

VLENB const #

const VLENB CSR = 0x0c22

VSATP const #

const VSATP CSR = 0x0280

VSCAUSE const #

const VSCAUSE CSR = 0x0242

VSEPC const #

const VSEPC CSR = 0x0241

VSIE const #

const VSIE CSR = 0x0204

VSIP const #

const VSIP CSR = 0x0244

VSSCRATCH const #

const VSSCRATCH CSR = 0x0240

VSSTATUS const #

const VSSTATUS CSR = 0x0200

VSTART const #

const VSTART CSR = 0x0008

VSTVAL const #

const VSTVAL CSR = 0x0243

VSTVEC const #

const VSTVEC CSR = 0x0205

VTYPE const #

const VTYPE CSR = 0x0c21

VXRM const #

const VXRM CSR = 0x000a

VXSAT const #

const VXSAT CSR = 0x0009

X0 const #

General-purpose register

const X0 Reg = iota

X1 const #

const X1

X10 const #

const X10

X11 const #

const X11

X12 const #

const X12

X13 const #

const X13

X14 const #

const X14

X15 const #

const X15

X16 const #

const X16

X17 const #

const X17

X18 const #

const X18

X19 const #

const X19

X2 const #

const X2

X20 const #

const X20

X21 const #

const X21

X22 const #

const X22

X23 const #

const X23

X24 const #

const X24

X25 const #

const X25

X26 const #

const X26

X27 const #

const X27

X28 const #

const X28

X29 const #

const X29

X3 const #

const X3

X30 const #

const X30

X31 const #

const X31

X4 const #

const X4

X5 const #

const X5

X6 const #

const X6

X7 const #

const X7

X8 const #

const X8

X9 const #

const X9

XNOR const #

const XNOR

XOR const #

const XOR

XORI const #

const XORI

ZEXT_H const #

const ZEXT_H

_ const #

const _ Op = iota

_ const #

const _ argType = iota

_CSR_map var #

var _CSR_map = map[CSR]string{...}

_CSR_name const #

const _CSR_name = "USTATUSFFLAGSFRMFCSRUIEUTVECUTVTVSTARTVXSATVXRMVCSRUSCRATCHUEPCUCAUSEUTVALUIPUNXTIUINTSTATUSUSCRATCHCSWUSCRATCHCSWLSSTATUSSEDELEGSIDELEGSIESTVECSCOUNTERENSTVTSSCRATCHSEPCSCAUSESTVALSIPSNXTISINTSTATUSSSCRATCHCSWSSCRATCHCSWLSATPVSSTATUSVSIEVSTVECVSSCRATCHVSEPCVSCAUSEVSTVALVSIPVSATPMSTATUSMISAMEDELEGMIDELEGMIEMTVECMCOUNTERENMTVTMSTATUSHMCOUNTINHIBITMHPMEVENT3MHPMEVENT4MHPMEVENT5MHPMEVENT6MHPMEVENT7MHPMEVENT8MHPMEVENT9MHPMEVENT10MHPMEVENT11MHPMEVENT12MHPMEVENT13MHPMEVENT14MHPMEVENT15MHPMEVENT16MHPMEVENT17MHPMEVENT18MHPMEVENT19MHPMEVENT20MHPMEVENT21MHPMEVENT22MHPMEVENT23MHPMEVENT24MHPMEVENT25MHPMEVENT26MHPMEVENT27MHPMEVENT28MHPMEVENT29MHPMEVENT30MHPMEVENT31MSCRATCHMEPCMCAUSEMTVALMIPMNXTIMINTSTATUSMSCRATCHCSWMSCRATCHCSWLMTINSTMTVAL2PMPCFG0PMPCFG1PMPCFG2PMPCFG3PMPADDR0PMPADDR1PMPADDR2PMPADDR3PMPADDR4PMPADDR5PMPADDR6PMPADDR7PMPADDR8PMPADDR9PMPADDR10PMPADDR11PMPADDR12PMPADDR13PMPADDR14PMPADDR15HSTATUSHEDELEGHIDELEGHIEHTIMEDELTAHCOUNTERENHGEIEHTIMEDELTAHHTVALHIPHVIPHTINSTHGATPTSELECTTDATA1TDATA2TDATA3TINFOTCONTROLMCONTEXTMNOISESCONTEXTDCSRDPCDSCRATCH0DSCRATCH1MCYCLEMINSTRETMHPMCOUNTER3MHPMCOUNTER4MHPMCOUNTER5MHPMCOUNTER6MHPMCOUNTER7MHPMCOUNTER8MHPMCOUNTER9MHPMCOUNTER10MHPMCOUNTER11MHPMCOUNTER12MHPMCOUNTER13MHPMCOUNTER14MHPMCOUNTER15MHPMCOUNTER16MHPMCOUNTER17MHPMCOUNTER18MHPMCOUNTER19MHPMCOUNTER20MHPMCOUNTER21MHPMCOUNTER22MHPMCOUNTER23MHPMCOUNTER24MHPMCOUNTER25MHPMCOUNTER26MHPMCOUNTER27MHPMCOUNTER28MHPMCOUNTER29MHPMCOUNTER30MHPMCOUNTER31MCYCLEHMINSTRETHMHPMCOUNTER3HMHPMCOUNTER4HMHPMCOUNTER5HMHPMCOUNTER6HMHPMCOUNTER7HMHPMCOUNTER8HMHPMCOUNTER9HMHPMCOUNTER10HMHPMCOUNTER11HMHPMCOUNTER12HMHPMCOUNTER13HMHPMCOUNTER14HMHPMCOUNTER15HMHPMCOUNTER16HMHPMCOUNTER17HMHPMCOUNTER18HMHPMCOUNTER19HMHPMCOUNTER20HMHPMCOUNTER21HMHPMCOUNTER22HMHPMCOUNTER23HMHPMCOUNTER24HMHPMCOUNTER25HMHPMCOUNTER26HMHPMCOUNTER27HMHPMCOUNTER28HMHPMCOUNTER29HMHPMCOUNTER30HMHPMCOUNTER31HCYCLETIMEINSTRETHPMCOUNTER3HPMCOUNTER4HPMCOUNTER5HPMCOUNTER6HPMCOUNTER7HPMCOUNTER8HPMCOUNTER9HPMCOUNTER10HPMCOUNTER11HPMCOUNTER12HPMCOUNTER13HPMCOUNTER14HPMCOUNTER15HPMCOUNTER16HPMCOUNTER17HPMCOUNTER18HPMCOUNTER19HPMCOUNTER20HPMCOUNTER21HPMCOUNTER22HPMCOUNTER23HPMCOUNTER24HPMCOUNTER25HPMCOUNTER26HPMCOUNTER27HPMCOUNTER28HPMCOUNTER29HPMCOUNTER30HPMCOUNTER31VLVTYPEVLENBCYCLEHTIMEHINSTRETHHPMCOUNTER3HHPMCOUNTER4HHPMCOUNTER5HHPMCOUNTER6HHPMCOUNTER7HHPMCOUNTER8HHPMCOUNTER9HHPMCOUNTER10HHPMCOUNTER11HHPMCOUNTER12HHPMCOUNTER13HHPMCOUNTER14HHPMCOUNTER15HHPMCOUNTER16HHPMCOUNTER17HHPMCOUNTER18HHPMCOUNTER19HHPMCOUNTER20HHPMCOUNTER21HHPMCOUNTER22HHPMCOUNTER23HHPMCOUNTER24HHPMCOUNTER25HHPMCOUNTER26HHPMCOUNTER27HHPMCOUNTER28HHPMCOUNTER29HHPMCOUNTER30HHPMCOUNTER31HHGEIPMVENDORIDMARCHIDMIMPIDMHARTIDMENTROPY"

arg_bimm12 const #

const arg_bimm12

arg_c_bimm9 const #

const arg_c_bimm9

arg_c_fs2 const #

const arg_c_fs2

arg_c_imm12 const #

const arg_c_imm12

arg_c_imm6 const #

const arg_c_imm6

arg_c_nzimm10 const #

const arg_c_nzimm10

arg_c_nzimm18 const #

const arg_c_nzimm18

arg_c_nzimm6 const #

const arg_c_nzimm6

arg_c_nzuimm10 const #

const arg_c_nzuimm10

arg_c_nzuimm6 const #

const arg_c_nzuimm6

arg_c_rs1_n0 const #

const arg_c_rs1_n0

arg_c_rs2 const #

const arg_c_rs2

arg_c_rs2_n0 const #

const arg_c_rs2_n0

arg_c_uimm7 const #

const arg_c_uimm7

arg_c_uimm8 const #

const arg_c_uimm8

arg_c_uimm8sp const #

const arg_c_uimm8sp

arg_c_uimm8sp_s const #

const arg_c_uimm8sp_s

arg_c_uimm9sp const #

const arg_c_uimm9sp

arg_c_uimm9sp_s const #

const arg_c_uimm9sp_s

arg_csr const #

const arg_csr

arg_fd const #

const arg_fd

arg_fd_p const #

const arg_fd_p

arg_fs1 const #

const arg_fs1

arg_fs2 const #

const arg_fs2

arg_fs2_p const #

const arg_fs2_p

arg_fs3 const #

const arg_fs3

arg_imm12 const #

const arg_imm12

arg_imm20 const #

const arg_imm20

arg_jimm20 const #

const arg_jimm20

arg_pred const #

const arg_pred

arg_rd const #

const arg_rd

arg_rd_n0 const #

const arg_rd_n0

arg_rd_n2 const #

const arg_rd_n2

arg_rd_p const #

RISC-V Compressed Extension Args

const arg_rd_p

arg_rd_rs1_n0 const #

const arg_rd_rs1_n0

arg_rd_rs1_p const #

const arg_rd_rs1_p

arg_rs1 const #

const arg_rs1

arg_rs1_amo const #

const arg_rs1_amo

arg_rs1_mem const #

const arg_rs1_mem

arg_rs1_n0 const #

const arg_rs1_n0

arg_rs1_p const #

const arg_rs1_p

arg_rs1_store const #

const arg_rs1_store

arg_rs2 const #

const arg_rs2

arg_rs2_p const #

const arg_rs2_p

arg_rs3 const #

const arg_rs3

arg_shamt5 const #

const arg_shamt5

arg_shamt6 const #

const arg_shamt6

arg_simm12 const #

const arg_simm12

arg_succ const #

const arg_succ

arg_zimm const #

const arg_zimm

decoderCover var #

var decoderCover []bool

errShort var #

var errShort = *ast.CallExpr

errUnknown var #

var errUnknown = *ast.CallExpr

instFormats var #

var instFormats = [...]instFormat{...}

opstr var #

var opstr = [...]string{...}

Type Aliases

Args type #

An Args holds the instruction arguments. If an instruction has fewer than 6 arguments, the final elements in the array are nil.

type Args [6]Arg

CSR type #

A CSR is a single control and status register. Use stringer to generate CSR match table. go:generate stringer -type=CSR

type CSR uint16

MemOrder type #

A MemOrder is a memory order hint in fence instruction

type MemOrder uint8

Op type #

An Op is a RISC-V opcode.

type Op uint16

Reg type #

A Reg is a single register. The zero value denotes X0, not the absence of a register.

type Reg uint16

argType type #

type argType uint16

argTypeList type #

type argTypeList [6]argType

Interfaces

Arg interface #

An Arg is a single instruction argument.

type Arg interface {
String() string
}

Structs

AmoReg struct #

An AmoReg is an atomic address register used in AMO instructions

type AmoReg struct {
reg Reg
}

Inst struct #

An Inst is a single instruction.

type Inst struct {
Op Op
Enc uint32
Args Args
Len int
}

RegOffset struct #

A RegOffset is a register with offset value

type RegOffset struct {
OfsReg Reg
Ofs Simm
}

Simm struct #

A Simm is a signed immediate number

type Simm struct {
Imm int32
Decimal bool
Width uint8
}

Uimm struct #

An Uimm is an unsigned immediate number

type Uimm struct {
Imm uint32
Decimal bool
}

instFormat struct #

An instFormat describes the format of an instruction encoding.

type instFormat struct {
mask uint32
value uint32
op Op
args argTypeList
}

Functions

Decode function #

Decode decodes the 4 bytes in src as a single instruction.

func Decode(src []byte) (Inst, error)

GNUSyntax function #

GNUSyntax returns the GNU assembler syntax for the instruction, as defined by GNU binutils. This form typically matches the syntax defined in the RISC-V Instruction Set Manual. See https://github.com/riscv/riscv-isa-manual/releases/download/Ratified-IMAFDQC/riscv-spec-20191213.pdf

func GNUSyntax(inst Inst) string

GoSyntax function #

GoSyntax returns the Go assembler syntax for the instruction. The syntax was originally defined by Plan 9. The pc is the program counter of the instruction, used for expanding PC-relative addresses into absolute ones. The symname function queries the symbol table for the program being disassembled. Given a target address it returns the name and base address of the symbol containing the target, if any; otherwise it returns "", 0. The reader text should read from the text segment using text addresses as offsets; it is used to display pc-relative loads as constant loads.

func GoSyntax(inst Inst, pc uint64, symname func(uint64) (string, uint64), text io.ReaderAt) string

String method #

func (si Simm) String() string

String method #

func (r Reg) String() string

String method #

func (amoReg AmoReg) String() string

String method #

func (regofs RegOffset) String() string

String method #

func (memOrder MemOrder) String() string

String method #

func (ui Uimm) String() string

String method #

func (i Inst) String() string

String method #

NOTE: The actual Op values are defined in tables.go.

func (op Op) String() string

String method #

func (i CSR) String() string

_ function #

func _()

convertCompressedIns function #

convertCompressedIns rewrites the RVC Instruction to regular Instructions

func convertCompressedIns(f *instFormat, args Args) Args

decodeArg function #

decodeArg decodes the arg described by aop from the instruction bits x. It returns nil if x cannot be decoded according to aop.

func decodeArg(aop argType, x uint32, index int) Arg

init function #

func init()

plan9Arg function #

func plan9Arg(inst *Inst, pc uint64, symname func(uint64) (string, uint64), arg Arg) string

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