AMD64 const #
const AMD64 ArchFamilyType = iota
const AMD64 ArchFamilyType = iota
const ARM
const ARM64
ArchFamily is the architecture family (AMD64, ARM, ...)
const ArchFamily ArchFamilyType = _ArchFamily
BigEndian reports whether the architecture is big-endian.
const BigEndian = *ast.BinaryExpr
DefaultPhysPageSize is the default physical page size.
const DefaultPhysPageSize = _DefaultPhysPageSize
const GOARCH = `mips`
const GOARCH = `arm64`
const GOARCH = `ppc64le`
const GOARCH = `armbe`
const GOARCH = `sparc`
const GOARCH = `s390`
const GOARCH = `riscv64`
const GOARCH = `amd64`
const GOARCH = `mips64p32le`
const GOARCH = `386`
const GOARCH = `mipsle`
const GOARCH = `mips64p32`
const GOARCH = `riscv`
const GOARCH = `s390x`
const GOARCH = `arm64be`
const GOARCH = `ppc`
const GOARCH = `mips64le`
const GOARCH = `wasm`
const GOARCH = `arm`
const GOARCH = `ppc64`
const GOARCH = `loong64`
const GOARCH = `mips64`
const GOARCH = `sparc64`
const I386
Int64Align is the required alignment for a 64-bit integer (4 on 32-bit systems, 8 on 64-bit).
const Int64Align = PtrSize
const Is386 = 0
const Is386 = 0
const Is386 = 0
const Is386 = 0
const Is386 = 0
const Is386 = 0
const Is386 = 0
const Is386 = 0
const Is386 = 0
const Is386 = 0
const Is386 = 0
const Is386 = 0
const Is386 = 0
const Is386 = 0
const Is386 = 0
const Is386 = 0
const Is386 = 0
const Is386 = 1
const Is386 = 0
const Is386 = 0
const Is386 = 0
const Is386 = 0
const Is386 = 0
const IsAmd64 = 0
const IsAmd64 = 0
const IsAmd64 = 0
const IsAmd64 = 0
const IsAmd64 = 0
const IsAmd64 = 1
const IsAmd64 = 0
const IsAmd64 = 0
const IsAmd64 = 0
const IsAmd64 = 0
const IsAmd64 = 0
const IsAmd64 = 0
const IsAmd64 = 0
const IsAmd64 = 0
const IsAmd64 = 0
const IsAmd64 = 0
const IsAmd64 = 0
const IsAmd64 = 0
const IsAmd64 = 0
const IsAmd64 = 0
const IsAmd64 = 0
const IsAmd64 = 0
const IsAmd64 = 0
const IsAmd64p32 = 0
const IsAmd64p32 = 0
const IsAmd64p32 = 0
const IsAmd64p32 = 0
const IsAmd64p32 = 0
const IsAmd64p32 = 0
const IsAmd64p32 = 0
const IsAmd64p32 = 0
const IsAmd64p32 = 0
const IsAmd64p32 = 0
const IsAmd64p32 = 0
const IsAmd64p32 = 0
const IsAmd64p32 = 0
const IsAmd64p32 = 0
const IsAmd64p32 = 0
const IsAmd64p32 = 0
const IsAmd64p32 = 0
const IsAmd64p32 = 0
const IsAmd64p32 = 0
const IsAmd64p32 = 0
const IsAmd64p32 = 0
const IsAmd64p32 = 0
const IsAmd64p32 = 0
const IsArm = 0
const IsArm = 0
const IsArm = 0
const IsArm = 0
const IsArm = 0
const IsArm = 0
const IsArm = 0
const IsArm = 0
const IsArm = 0
const IsArm = 0
const IsArm = 0
const IsArm = 0
const IsArm = 0
const IsArm = 0
const IsArm = 0
const IsArm = 0
const IsArm = 0
const IsArm = 0
const IsArm = 0
const IsArm = 0
const IsArm = 1
const IsArm = 0
const IsArm = 0
const IsArm64 = 0
const IsArm64 = 0
const IsArm64 = 0
const IsArm64 = 0
const IsArm64 = 0
const IsArm64 = 0
const IsArm64 = 1
const IsArm64 = 0
const IsArm64 = 0
const IsArm64 = 0
const IsArm64 = 0
const IsArm64 = 0
const IsArm64 = 0
const IsArm64 = 0
const IsArm64 = 0
const IsArm64 = 0
const IsArm64 = 0
const IsArm64 = 0
const IsArm64 = 0
const IsArm64 = 0
const IsArm64 = 0
const IsArm64 = 0
const IsArm64 = 0
const IsArm64be = 0
const IsArm64be = 0
const IsArm64be = 0
const IsArm64be = 0
const IsArm64be = 0
const IsArm64be = 0
const IsArm64be = 0
const IsArm64be = 1
const IsArm64be = 0
const IsArm64be = 0
const IsArm64be = 0
const IsArm64be = 0
const IsArm64be = 0
const IsArm64be = 0
const IsArm64be = 0
const IsArm64be = 0
const IsArm64be = 0
const IsArm64be = 0
const IsArm64be = 0
const IsArm64be = 0
const IsArm64be = 0
const IsArm64be = 0
const IsArm64be = 0
const IsArmbe = 0
const IsArmbe = 0
const IsArmbe = 0
const IsArmbe = 0
const IsArmbe = 0
const IsArmbe = 0
const IsArmbe = 0
const IsArmbe = 0
const IsArmbe = 0
const IsArmbe = 0
const IsArmbe = 0
const IsArmbe = 0
const IsArmbe = 0
const IsArmbe = 0
const IsArmbe = 0
const IsArmbe = 0
const IsArmbe = 0
const IsArmbe = 0
const IsArmbe = 1
const IsArmbe = 0
const IsArmbe = 0
const IsArmbe = 0
const IsArmbe = 0
const IsLoong64 = 0
const IsLoong64 = 0
const IsLoong64 = 0
const IsLoong64 = 0
const IsLoong64 = 0
const IsLoong64 = 0
const IsLoong64 = 0
const IsLoong64 = 0
const IsLoong64 = 0
const IsLoong64 = 0
const IsLoong64 = 0
const IsLoong64 = 0
const IsLoong64 = 0
const IsLoong64 = 0
const IsLoong64 = 0
const IsLoong64 = 1
const IsLoong64 = 0
const IsLoong64 = 0
const IsLoong64 = 0
const IsLoong64 = 0
const IsLoong64 = 0
const IsLoong64 = 0
const IsLoong64 = 0
const IsMips = 0
const IsMips = 0
const IsMips = 1
const IsMips = 0
const IsMips = 0
const IsMips = 0
const IsMips = 0
const IsMips = 0
const IsMips = 0
const IsMips = 0
const IsMips = 0
const IsMips = 0
const IsMips = 0
const IsMips = 0
const IsMips = 0
const IsMips = 0
const IsMips = 0
const IsMips = 0
const IsMips = 0
const IsMips = 0
const IsMips = 0
const IsMips = 0
const IsMips = 0
const IsMips64 = 0
const IsMips64 = 0
const IsMips64 = 0
const IsMips64 = 0
const IsMips64 = 0
const IsMips64 = 0
const IsMips64 = 0
const IsMips64 = 0
const IsMips64 = 0
const IsMips64 = 0
const IsMips64 = 0
const IsMips64 = 0
const IsMips64 = 0
const IsMips64 = 0
const IsMips64 = 0
const IsMips64 = 0
const IsMips64 = 0
const IsMips64 = 0
const IsMips64 = 0
const IsMips64 = 0
const IsMips64 = 0
const IsMips64 = 1
const IsMips64 = 0
const IsMips64le = 0
const IsMips64le = 0
const IsMips64le = 0
const IsMips64le = 0
const IsMips64le = 0
const IsMips64le = 0
const IsMips64le = 0
const IsMips64le = 1
const IsMips64le = 0
const IsMips64le = 0
const IsMips64le = 0
const IsMips64le = 0
const IsMips64le = 0
const IsMips64le = 0
const IsMips64le = 0
const IsMips64le = 0
const IsMips64le = 0
const IsMips64le = 0
const IsMips64le = 0
const IsMips64le = 0
const IsMips64le = 0
const IsMips64le = 0
const IsMips64le = 0
const IsMips64p32 = 0
const IsMips64p32 = 0
const IsMips64p32 = 0
const IsMips64p32 = 1
const IsMips64p32 = 0
const IsMips64p32 = 0
const IsMips64p32 = 0
const IsMips64p32 = 0
const IsMips64p32 = 0
const IsMips64p32 = 0
const IsMips64p32 = 0
const IsMips64p32 = 0
const IsMips64p32 = 0
const IsMips64p32 = 0
const IsMips64p32 = 0
const IsMips64p32 = 0
const IsMips64p32 = 0
const IsMips64p32 = 0
const IsMips64p32 = 0
const IsMips64p32 = 0
const IsMips64p32 = 0
const IsMips64p32 = 0
const IsMips64p32 = 0
const IsMips64p32le = 0
const IsMips64p32le = 0
const IsMips64p32le = 0
const IsMips64p32le = 0
const IsMips64p32le = 0
const IsMips64p32le = 0
const IsMips64p32le = 1
const IsMips64p32le = 0
const IsMips64p32le = 0
const IsMips64p32le = 0
const IsMips64p32le = 0
const IsMips64p32le = 0
const IsMips64p32le = 0
const IsMips64p32le = 0
const IsMips64p32le = 0
const IsMips64p32le = 0
const IsMips64p32le = 0
const IsMips64p32le = 0
const IsMips64p32le = 0
const IsMips64p32le = 0
const IsMips64p32le = 0
const IsMips64p32le = 0
const IsMips64p32le = 0
const IsMipsle = 0
const IsMipsle = 0
const IsMipsle = 0
const IsMipsle = 0
const IsMipsle = 0
const IsMipsle = 0
const IsMipsle = 0
const IsMipsle = 0
const IsMipsle = 0
const IsMipsle = 0
const IsMipsle = 0
const IsMipsle = 1
const IsMipsle = 0
const IsMipsle = 0
const IsMipsle = 0
const IsMipsle = 0
const IsMipsle = 0
const IsMipsle = 0
const IsMipsle = 0
const IsMipsle = 0
const IsMipsle = 0
const IsMipsle = 0
const IsMipsle = 0
const IsPpc = 0
const IsPpc = 0
const IsPpc = 0
const IsPpc = 0
const IsPpc = 0
const IsPpc = 0
const IsPpc = 0
const IsPpc = 0
const IsPpc = 0
const IsPpc = 0
const IsPpc = 0
const IsPpc = 0
const IsPpc = 0
const IsPpc = 1
const IsPpc = 0
const IsPpc = 0
const IsPpc = 0
const IsPpc = 0
const IsPpc = 0
const IsPpc = 0
const IsPpc = 0
const IsPpc = 0
const IsPpc = 0
const IsPpc64 = 0
const IsPpc64 = 0
const IsPpc64 = 0
const IsPpc64 = 0
const IsPpc64 = 0
const IsPpc64 = 0
const IsPpc64 = 0
const IsPpc64 = 0
const IsPpc64 = 0
const IsPpc64 = 0
const IsPpc64 = 0
const IsPpc64 = 0
const IsPpc64 = 0
const IsPpc64 = 0
const IsPpc64 = 0
const IsPpc64 = 0
const IsPpc64 = 0
const IsPpc64 = 0
const IsPpc64 = 0
const IsPpc64 = 0
const IsPpc64 = 0
const IsPpc64 = 0
const IsPpc64 = 1
const IsPpc64le = 0
const IsPpc64le = 0
const IsPpc64le = 0
const IsPpc64le = 0
const IsPpc64le = 0
const IsPpc64le = 0
const IsPpc64le = 0
const IsPpc64le = 0
const IsPpc64le = 0
const IsPpc64le = 0
const IsPpc64le = 0
const IsPpc64le = 0
const IsPpc64le = 0
const IsPpc64le = 0
const IsPpc64le = 0
const IsPpc64le = 0
const IsPpc64le = 0
const IsPpc64le = 0
const IsPpc64le = 0
const IsPpc64le = 0
const IsPpc64le = 1
const IsPpc64le = 0
const IsPpc64le = 0
const IsRiscv = 0
const IsRiscv = 0
const IsRiscv = 0
const IsRiscv = 0
const IsRiscv = 0
const IsRiscv = 0
const IsRiscv = 0
const IsRiscv = 0
const IsRiscv = 0
const IsRiscv = 0
const IsRiscv = 0
const IsRiscv = 0
const IsRiscv = 0
const IsRiscv = 0
const IsRiscv = 0
const IsRiscv = 0
const IsRiscv = 1
const IsRiscv = 0
const IsRiscv = 0
const IsRiscv = 0
const IsRiscv = 0
const IsRiscv = 0
const IsRiscv = 0
const IsRiscv64 = 0
const IsRiscv64 = 0
const IsRiscv64 = 0
const IsRiscv64 = 0
const IsRiscv64 = 0
const IsRiscv64 = 0
const IsRiscv64 = 0
const IsRiscv64 = 0
const IsRiscv64 = 1
const IsRiscv64 = 0
const IsRiscv64 = 0
const IsRiscv64 = 0
const IsRiscv64 = 0
const IsRiscv64 = 0
const IsRiscv64 = 0
const IsRiscv64 = 0
const IsRiscv64 = 0
const IsRiscv64 = 0
const IsRiscv64 = 0
const IsRiscv64 = 0
const IsRiscv64 = 0
const IsRiscv64 = 0
const IsRiscv64 = 0
const IsS390 = 0
const IsS390 = 0
const IsS390 = 0
const IsS390 = 1
const IsS390 = 0
const IsS390 = 0
const IsS390 = 0
const IsS390 = 0
const IsS390 = 0
const IsS390 = 0
const IsS390 = 0
const IsS390 = 0
const IsS390 = 0
const IsS390 = 0
const IsS390 = 0
const IsS390 = 0
const IsS390 = 0
const IsS390 = 0
const IsS390 = 0
const IsS390 = 0
const IsS390 = 0
const IsS390 = 0
const IsS390 = 0
const IsS390x = 0
const IsS390x = 0
const IsS390x = 0
const IsS390x = 0
const IsS390x = 0
const IsS390x = 0
const IsS390x = 0
const IsS390x = 0
const IsS390x = 0
const IsS390x = 0
const IsS390x = 0
const IsS390x = 0
const IsS390x = 0
const IsS390x = 0
const IsS390x = 0
const IsS390x = 0
const IsS390x = 1
const IsS390x = 0
const IsS390x = 0
const IsS390x = 0
const IsS390x = 0
const IsS390x = 0
const IsS390x = 0
const IsSparc = 0
const IsSparc = 1
const IsSparc = 0
const IsSparc = 0
const IsSparc = 0
const IsSparc = 0
const IsSparc = 0
const IsSparc = 0
const IsSparc = 0
const IsSparc = 0
const IsSparc = 0
const IsSparc = 0
const IsSparc = 0
const IsSparc = 0
const IsSparc = 0
const IsSparc = 0
const IsSparc = 0
const IsSparc = 0
const IsSparc = 0
const IsSparc = 0
const IsSparc = 0
const IsSparc = 0
const IsSparc = 0
const IsSparc64 = 0
const IsSparc64 = 0
const IsSparc64 = 0
const IsSparc64 = 0
const IsSparc64 = 0
const IsSparc64 = 0
const IsSparc64 = 0
const IsSparc64 = 0
const IsSparc64 = 0
const IsSparc64 = 0
const IsSparc64 = 0
const IsSparc64 = 0
const IsSparc64 = 0
const IsSparc64 = 0
const IsSparc64 = 0
const IsSparc64 = 0
const IsSparc64 = 0
const IsSparc64 = 1
const IsSparc64 = 0
const IsSparc64 = 0
const IsSparc64 = 0
const IsSparc64 = 0
const IsSparc64 = 0
const IsWasm = 0
const IsWasm = 0
const IsWasm = 0
const IsWasm = 0
const IsWasm = 0
const IsWasm = 0
const IsWasm = 0
const IsWasm = 0
const IsWasm = 0
const IsWasm = 0
const IsWasm = 0
const IsWasm = 0
const IsWasm = 0
const IsWasm = 0
const IsWasm = 1
const IsWasm = 0
const IsWasm = 0
const IsWasm = 0
const IsWasm = 0
const IsWasm = 0
const IsWasm = 0
const IsWasm = 0
const IsWasm = 0
const LOONG64
const MIPS
const MIPS64
MinFrameSize is the size of the system-reserved words at the bottom of a frame (just above the architectural stack pointer). It is zero on x86 and PtrSize on most non-x86 (LR-based) systems. On PowerPC it is larger, to cover three more reserved words: the compiler word, the link editor word, and the TOC save word.
const MinFrameSize = _MinFrameSize
PCQuantum is the minimal unit for a program counter (1 on x86, 4 on most other systems). The various PC tables record PC deltas pre-divided by PCQuantum.
const PCQuantum = _PCQuantum
const PPC64
PtrSize is the size of a pointer in bytes - unsafe.Sizeof(uintptr(0)) but as an ideal constant. It is also the size of the machine's native word size (that is, 4 on 32-bit systems, 8 on 64-bit).
const PtrSize = *ast.BinaryExpr
const RISCV64
const S390X
StackAlign is the required alignment of the SP register. The stack must be at least word aligned, but some architectures require more.
const StackAlign = _StackAlign
const WASM
const _ArchFamily = WASM
const _ArchFamily = AMD64
const _ArchFamily = LOONG64
const _ArchFamily = S390X
const _ArchFamily = MIPS
const _ArchFamily = MIPS64
const _ArchFamily = PPC64
const _ArchFamily = MIPS
const _ArchFamily = PPC64
const _ArchFamily = ARM
const _ArchFamily = I386
const _ArchFamily = MIPS64
const _ArchFamily = RISCV64
const _ArchFamily = ARM64
const _DefaultPhysPageSize = 65536
const _DefaultPhysPageSize = 65536
const _DefaultPhysPageSize = 4096
const _DefaultPhysPageSize = 4096
const _DefaultPhysPageSize = 65536
const _DefaultPhysPageSize = 65536
const _DefaultPhysPageSize = 16384
const _DefaultPhysPageSize = 65536
const _DefaultPhysPageSize = 65536
const _DefaultPhysPageSize = 65536
const _DefaultPhysPageSize = 4096
const _DefaultPhysPageSize = 16384
const _DefaultPhysPageSize = 4096
const _DefaultPhysPageSize = 16384
const _MinFrameSize = 8
const _MinFrameSize = 8
const _MinFrameSize = 4
const _MinFrameSize = 8
const _MinFrameSize = 0
const _MinFrameSize = 32
const _MinFrameSize = 8
const _MinFrameSize = 0
const _MinFrameSize = 4
const _MinFrameSize = 32
const _MinFrameSize = 8
const _MinFrameSize = 0
const _MinFrameSize = 4
const _MinFrameSize = 8
const _PCQuantum = 4
const _PCQuantum = 4
const _PCQuantum = 2
const _PCQuantum = 4
const _PCQuantum = 4
const _PCQuantum = 4
const _PCQuantum = 1
const _PCQuantum = 4
const _PCQuantum = 4
const _PCQuantum = 1
const _PCQuantum = 4
const _PCQuantum = 4
const _PCQuantum = 1
const _PCQuantum = 4
const _StackAlign = 16
const _StackAlign = PtrSize
const _StackAlign = 16
const _StackAlign = PtrSize
const _StackAlign = PtrSize
const _StackAlign = PtrSize
const _StackAlign = PtrSize
const _StackAlign = PtrSize
const _StackAlign = PtrSize
const _StackAlign = 16
const _StackAlign = PtrSize
const _StackAlign = PtrSize
const _StackAlign = PtrSize
const _StackAlign = PtrSize
type ArchFamilyType int
Generated with Arrow